[Freedreno] [PATCH 09/11] drm/msm/disp/dpu1: Add support for DSC in topology
abhinavk at codeaurora.org
abhinavk at codeaurora.org
Tue Aug 3 01:05:50 UTC 2021
On 2021-07-14 23:52, Vinod Koul wrote:
> For DSC to work we typically need a 2,2,1 configuration. This should
> suffice for resolutions upto 4k. For more resolutions like 8k this
> won't
> work.
>
> The topology information is provided by DTS so we try to deduce the
> topology required for DSC.
> Furthermore, we can use 1 DSC encoder in lesser resolutions, but that
> is
> not power efficient according to Abhinav, it is better to use 2 mixers
> as that will split width/2 and is proven to be power efficient.
I think now that we have added the technical reason of why it is better
to use
2-2-1 ( using 2 LMs is better than one as it will half layer width), we
can drop my name from the commit text
as it holds less value than the actual reason itself :)
You can still keep my signed-off and co-developed by tag
>
> Also, the panel has been tested only with 2,2,1 configuration, so for
> now we blindly create 2,2,1 topology when DSC is enabled
>
> Co-developed-by: Abhinav Kumar <abhinavk at codeaurora.org>
> Signed-off-by: Abhinav Kumar <abhinavk at codeaurora.org>
> Signed-off-by: Vinod Koul <vkoul at kernel.org>
> ---
> Changes since RFC:
> - Add more details in changelog
>
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index 41140b781e66..8f0a8bd9c8ff 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -573,6 +573,8 @@ static struct msm_display_topology
> dpu_encoder_get_topology(
> struct drm_display_mode *mode)
> {
> struct msm_display_topology topology = {0};
> + struct drm_encoder *drm_enc;
> + struct msm_drm_private *priv;
> int i, intf_count = 0;
>
> for (i = 0; i < MAX_PHYS_ENCODERS_PER_VIRTUAL; i++)
> @@ -607,8 +609,22 @@ static struct msm_display_topology
> dpu_encoder_get_topology(
> topology.num_enc = 0;
> topology.num_intf = intf_count;
>
> + drm_enc = &dpu_enc->base;
> + priv = drm_enc->dev->dev_private;
> + if (priv && priv->dsc) {
if dsc is moved to the encoder, this will need to be changed too
> + /* In case of Display Stream Compression DSC, we would use
> + * 2 encoders, 2 line mixers and 1 interface
> + * this is power optimal and can drive upto (including) 4k
> + * screens
> + */
> + topology.num_enc = 2;
> + topology.num_intf = 1;
> + topology.num_lm = 2;
> + }
> +
> return topology;
> }
> +
> static int dpu_encoder_virt_atomic_check(
> struct drm_encoder *drm_enc,
> struct drm_crtc_state *crtc_state,
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