[PATCH 0/4] Enable GuC submission by default on DG1
Daniel Vetter
daniel at ffwll.ch
Tue Aug 3 12:15:13 UTC 2021
On Tue, Aug 3, 2021 at 6:53 AM Matthew Brost <matthew.brost at intel.com> wrote:
>
> Minimum set of patches to enable GuC submission on DG1 and enable it by
> default.
>
> A little difficult to test as IGTs do not work with DG1 due to a bunch
> of uAPI features being disabled (e.g. relocations, caching memory
> options, etc...).
Matt Auld has an igt series which fixes a lot of this stuff, would be
good to do at least a Test-With run with that.
Also I'm assuming that for ADL-P we'll get this equivalent patch set
soon, and there we should be able to get real results?
-Daniel
>
> Tested with the loading the driver and 'live' selftests. Submissions
> seem to work.
>
> Signed-off-by: Matthew Brost <matthew.brost at intel.com>
>
> Daniele Ceraolo Spurio (1):
> drm/i915/guc: put all guc objects in lmem when available
>
> Matthew Brost (2):
> drm/i915/guc: Add DG1 GuC / HuC firmware defs
> drm/i915/guc: Enable GuC submission by default on DG1
>
> Venkata Sandeep Dhanalakota (1):
> drm/i915: Do not define vma on stack
>
> drivers/gpu/drm/i915/gem/i915_gem_lmem.c | 26 +++++++
> drivers/gpu/drm/i915/gem/i915_gem_lmem.h | 4 +
> drivers/gpu/drm/i915/gt/uc/intel_guc.c | 9 ++-
> drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c | 11 ++-
> drivers/gpu/drm/i915/gt/uc/intel_huc.c | 14 +++-
> drivers/gpu/drm/i915/gt/uc/intel_uc.c | 2 +-
> drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 90 ++++++++++++++++++++---
> drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h | 2 +
> 8 files changed, 138 insertions(+), 20 deletions(-)
>
> --
> 2.28.0
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
More information about the dri-devel
mailing list