[Freedreno] [PATCH] drm/msm/dsi: add support for dsi test pattern generator

[abhinavk at codeaurora.org]

Hi Marijn

Thanks for reviewing and testing the latest patchset.

On 2021-08-10 15:59, Marijn Suijten wrote:
> Hi Abhinav,
> 
> On 7/16/21 2:01 AM, abhinavk at codeaurora.org wrote:
>> Hi Marijn
>> 
>> Sorry for the late response.
> 
> 
> Apologies from my side as well.
> 
> [...]
> 
>>>> +static void msm_dsi_host_cmd_test_pattern_setup(struct msm_dsi_host
>>>> *msm_host)
>>>> +{
>>>> +	u32 reg;
>>>> +
>>>> +	reg = dsi_read(msm_host, REG_DSI_TEST_PATTERN_GEN_CTRL);
>>>> +
>>>> +	dsi_write(msm_host, REG_DSI_TEST_PATTERN_GEN_CMD_MDP_INIT_VAL0,
>>>> 0xff);
>>>> +
>>>> +	reg |= (0x3 << 0x8);
>>>> +	dsi_write(msm_host, REG_DSI_TEST_PATTERN_GEN_CTRL, reg);
>>>> +	/* draw checkered rectangle pattern */
>>>> +	dsi_write(msm_host, REG_DSI_TPG_MAIN_CONTROL2, (0x1 << 0x7));
>>> 
>>> 
>>> How about BIT(7)?
>> 
>> You mean BIT(7) of REG_DSI_TPG_MAIN_CONTROL2? Thats what this is 
>> right?
>> Did you mean some other bit?
> 
> 
> I meant to replace (0x1 << 0x7) with BIT(7), but replacing it with
> DSI_TPG_MAIN_CONTROL2_CMD_MDP0_CHECKERED_RECTANGLE_PATTERN is even
> better, thanks.
> 
>> 
>>> 
>>> On SM6125 this seems to change the color intensity of the pattern; it
>>> is always colored lines of a few pixels wide alternating R, B and G
>>> from left to right.  Is it possible to document the meaning and
>>> available values of these registers, especially if they differ 
>>> between
>>> SoC / DSI block?
>>> 
>> 
>> I have requested access for SM6125, will check this register on that 
>> to
>> see if there
>> is any difference.
>> 
>> Are you saying you are not seeing a rectangular checkered pattern 
>> while
>> testing?
> 
> 
> Correct.  It's fixed now, and this patch already proves its
> usefulness!  We had two minor configuration issues, and are now seeing
> the squares just like on the other SoCs.  Meaning we can finally move
> on to configuring the DPU, thanks!
> 

Thats good to know !

>> Also are you testing on command mode or video mode?
> 
> 
> Command mode, if it's still worth anything.
Thats good to know too, as I had not been able to test command mode.
> 
>> As requested by Rob, I will add the bit definitions and update the
>> dsi.xml.h in the
>> next patchset for the registers and the bits which I am using here.
>> 
>> With that the meaning of these bits will be more clear.
>> 
>> I dont think I will be able to document all the bits because the goal 
>> of
>> this patch
>> was only to draw a test pattern to help with validation. Different 
>> bits
>> of the REG_DSI_TPG_MAIN_CONTROL2
>> register only draw different patterns so the goal wasnt that we can 
>> draw
>> any pattern, it was just to
>> draw some pattern on the screen.
>> 
>> When we add support for all other patterns, we can expose those bits 
>> as
>> well but it should not
>> be required in my opinion.
> 
> 
> Understandable.  I'm curious if other patterns are useful in certain
> situations, like DSC?  Other than that, knowing that the DSI and PHY
> is correct is good enough for us.

The TPG in this patch is only for the DSI block which is after the DSC 
block.
So any pattern we pick from the DSI_TPG_MAIN_CONTROL2 register (using 
any other bit)
will only look different visually but will still be from DSI and no 
other block.
So it will not help to validate DSC block individually.

> 
>> 
>>> Kind regards,
>>> Marijn
>>> 
>>>> +	DBG("Cmd test pattern setup done\n");
>>>> +}
>>> [...]
> 
> 
> Thanks!
> Marijn