[PATCH v3 1/3] dt-bindings: Add YAML bindings for NVDEC
Rob Herring
robh at kernel.org
Tue Aug 17 21:20:41 UTC 2021
On Wed, Aug 11, 2021 at 01:50:28PM +0300, Mikko Perttunen wrote:
> Add YAML device tree bindings for NVDEC, now in a more appropriate
> place compared to the old textual Host1x bindings.
>
> Signed-off-by: Mikko Perttunen <mperttunen at nvidia.com>
> ---
> v3:
> * Drop host1x bindings
> * Change read2 to read-1 in interconnect names
> v2:
> * Fix issues pointed out in v1
> * Add T194 nvidia,instance property
> ---
> .../gpu/host1x/nvidia,tegra210-nvdec.yaml | 109 ++++++++++++++++++
> MAINTAINERS | 1 +
> 2 files changed, 110 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvdec.yaml
>
> diff --git a/Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvdec.yaml b/Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvdec.yaml
> new file mode 100644
> index 000000000000..571849625da8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvdec.yaml
> @@ -0,0 +1,109 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvdec.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Device tree binding for NVIDIA Tegra NVDEC
> +
> +description: |
> + NVDEC is the hardware video decoder present on NVIDIA Tegra210
> + and newer chips. It is located on the Host1x bus and typically
> + programmed through Host1x channels.
> +
> +maintainers:
> + - Thierry Reding <treding at gmail.com>
> + - Mikko Perttunen <mperttunen at nvidia.com>
> +
> +properties:
> + $nodename:
> + pattern: "^nvdec@[0-9a-f]*$"
> +
> + compatible:
> + enum:
> + - nvidia,tegra210-nvdec
> + - nvidia,tegra186-nvdec
> + - nvidia,tegra194-nvdec
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + clock-names:
> + items:
> + - const: nvdec
> +
> + resets:
> + maxItems: 1
> +
> + reset-names:
> + items:
> + - const: nvdec
> +
> + power-domains:
> + maxItems: 1
> +
> + iommus:
> + maxItems: 1
> +
> + interconnects:
> + items:
> + - description: DMA read memory client
> + - description: DMA read 2 memory client
> + - description: DMA write memory client
> +
> + interconnect-names:
> + items:
> + - const: dma-mem
> + - const: read-1
> + - const: write
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> + - resets
> + - reset-names
> + - power-domains
> +
> +if:
> + properties:
> + compatible:
> + contains:
> + const: nvidia,tegra194-host1x
host1x? This will never be true as the schema is only applied to nodes
with the nvdec compatible.
> +then:
> + properties:
> + nvidia,instance:
> + items:
> + - description: 0 for NVDEC0, or 1 for NVDEC1
What's this for? We generally don't do indices in DT.
> +
> +additionalProperties: true
This should be false or 'unevaluatedProperties: false'
Rob
More information about the dri-devel
mailing list