[PATCH 2/6] drm/gma500: Remove unused DPST support

Thomas Zimmermann tzimmermann at suse.de
Mon Feb 1 14:35:49 UTC 2021



Am 01.02.21 um 14:26 schrieb Patrik Jakobsson:
> DPST never got enabled so remove it. We keep the reg save/restore code
> just for safety.
> 
> Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson at gmail.com>

Reviewed-by: Thomas Zimmermann <tzimmermann at suse.de>

> ---
>   drivers/gpu/drm/gma500/psb_drv.h       |   4 -
>   drivers/gpu/drm/gma500/psb_intel_reg.h |  32 -------
>   drivers/gpu/drm/gma500/psb_irq.c       | 110 -------------------------
>   drivers/gpu/drm/gma500/psb_irq.h       |   4 -
>   4 files changed, 150 deletions(-)
> 
> diff --git a/drivers/gpu/drm/gma500/psb_drv.h b/drivers/gpu/drm/gma500/psb_drv.h
> index 020a71b91577..d4f14a5d509b 100644
> --- a/drivers/gpu/drm/gma500/psb_drv.h
> +++ b/drivers/gpu/drm/gma500/psb_drv.h
> @@ -622,13 +622,9 @@ static inline struct drm_psb_private *psb_priv(struct drm_device *dev)
>   
>   /* psb_irq.c */
>   extern irqreturn_t psb_irq_handler(int irq, void *arg);
> -extern int psb_irq_enable_dpst(struct drm_device *dev);
> -extern int psb_irq_disable_dpst(struct drm_device *dev);
>   extern void psb_irq_preinstall(struct drm_device *dev);
>   extern int psb_irq_postinstall(struct drm_device *dev);
>   extern void psb_irq_uninstall(struct drm_device *dev);
> -extern void psb_irq_turn_on_dpst(struct drm_device *dev);
> -extern void psb_irq_turn_off_dpst(struct drm_device *dev);
>   
>   extern void psb_irq_uninstall_islands(struct drm_device *dev, int hw_islands);
>   extern int psb_vblank_wait2(struct drm_device *dev, unsigned int *sequence);
> diff --git a/drivers/gpu/drm/gma500/psb_intel_reg.h b/drivers/gpu/drm/gma500/psb_intel_reg.h
> index 364ea8f06f9c..ced7b433befb 100644
> --- a/drivers/gpu/drm/gma500/psb_intel_reg.h
> +++ b/drivers/gpu/drm/gma500/psb_intel_reg.h
> @@ -550,38 +550,6 @@
>   #define HISTOGRAM_INT_CTRL_CLEAR		(1UL << 30)
>   #define DPST_YUV_LUMA_MODE			0
>   
> -struct dpst_ie_histogram_control {
> -	union {
> -		uint32_t data;
> -		struct {
> -			uint32_t bin_reg_index:7;
> -			uint32_t reserved:4;
> -			uint32_t bin_reg_func_select:1;
> -			uint32_t sync_to_phase_in:1;
> -			uint32_t alt_enhancement_mode:2;
> -			uint32_t reserved1:1;
> -			uint32_t sync_to_phase_in_count:8;
> -			uint32_t histogram_mode_select:1;
> -			uint32_t reserved2:4;
> -			uint32_t ie_pipe_assignment:1;
> -			uint32_t ie_mode_table_enabled:1;
> -			uint32_t ie_histogram_enable:1;
> -		};
> -	};
> -};
> -
> -struct dpst_guardband {
> -	union {
> -		uint32_t data;
> -		struct {
> -			uint32_t guardband:22;
> -			uint32_t guardband_interrupt_delay:8;
> -			uint32_t interrupt_status:1;
> -			uint32_t interrupt_enable:1;
> -		};
> -	};
> -};
> -
>   #define PIPEAFRAMEHIGH		0x70040
>   #define PIPEAFRAMEPIXEL		0x70044
>   #define PIPEBFRAMEHIGH		0x71040
> diff --git a/drivers/gpu/drm/gma500/psb_irq.c b/drivers/gpu/drm/gma500/psb_irq.c
> index ae9b100e640b..104009e78487 100644
> --- a/drivers/gpu/drm/gma500/psb_irq.c
> +++ b/drivers/gpu/drm/gma500/psb_irq.c
> @@ -101,30 +101,6 @@ psb_disable_pipestat(struct drm_psb_private *dev_priv, int pipe, u32 mask)
>   	}
>   }
>   
> -static void mid_enable_pipe_event(struct drm_psb_private *dev_priv, int pipe)
> -{
> -	if (gma_power_begin(dev_priv->dev, false)) {
> -		u32 pipe_event = mid_pipe_event(pipe);
> -		dev_priv->vdc_irq_mask |= pipe_event;
> -		PSB_WVDC32(~dev_priv->vdc_irq_mask, PSB_INT_MASK_R);
> -		PSB_WVDC32(dev_priv->vdc_irq_mask, PSB_INT_ENABLE_R);
> -		gma_power_end(dev_priv->dev);
> -	}
> -}
> -
> -static void mid_disable_pipe_event(struct drm_psb_private *dev_priv, int pipe)
> -{
> -	if (dev_priv->pipestat[pipe] == 0) {
> -		if (gma_power_begin(dev_priv->dev, false)) {
> -			u32 pipe_event = mid_pipe_event(pipe);
> -			dev_priv->vdc_irq_mask &= ~pipe_event;
> -			PSB_WVDC32(~dev_priv->vdc_irq_mask, PSB_INT_MASK_R);
> -			PSB_WVDC32(dev_priv->vdc_irq_mask, PSB_INT_ENABLE_R);
> -			gma_power_end(dev_priv->dev);
> -		}
> -	}
> -}
> -
>   /*
>    * Display controller interrupt handler for pipe event.
>    */
> @@ -392,92 +368,6 @@ void psb_irq_uninstall(struct drm_device *dev)
>   	spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);
>   }
>   
> -void psb_irq_turn_on_dpst(struct drm_device *dev)
> -{
> -	struct drm_psb_private *dev_priv =
> -		(struct drm_psb_private *) dev->dev_private;
> -	u32 hist_reg;
> -	u32 pwm_reg;
> -
> -	if (gma_power_begin(dev, false)) {
> -		PSB_WVDC32(1 << 31, HISTOGRAM_LOGIC_CONTROL);
> -		hist_reg = PSB_RVDC32(HISTOGRAM_LOGIC_CONTROL);
> -		PSB_WVDC32(1 << 31, HISTOGRAM_INT_CONTROL);
> -		hist_reg = PSB_RVDC32(HISTOGRAM_INT_CONTROL);
> -
> -		PSB_WVDC32(0x80010100, PWM_CONTROL_LOGIC);
> -		pwm_reg = PSB_RVDC32(PWM_CONTROL_LOGIC);
> -		PSB_WVDC32(pwm_reg | PWM_PHASEIN_ENABLE
> -						| PWM_PHASEIN_INT_ENABLE,
> -							   PWM_CONTROL_LOGIC);
> -		pwm_reg = PSB_RVDC32(PWM_CONTROL_LOGIC);
> -
> -		psb_enable_pipestat(dev_priv, 0, PIPE_DPST_EVENT_ENABLE);
> -
> -		hist_reg = PSB_RVDC32(HISTOGRAM_INT_CONTROL);
> -		PSB_WVDC32(hist_reg | HISTOGRAM_INT_CTRL_CLEAR,
> -							HISTOGRAM_INT_CONTROL);
> -		pwm_reg = PSB_RVDC32(PWM_CONTROL_LOGIC);
> -		PSB_WVDC32(pwm_reg | 0x80010100 | PWM_PHASEIN_ENABLE,
> -							PWM_CONTROL_LOGIC);
> -
> -		gma_power_end(dev);
> -	}
> -}
> -
> -int psb_irq_enable_dpst(struct drm_device *dev)
> -{
> -	struct drm_psb_private *dev_priv =
> -		(struct drm_psb_private *) dev->dev_private;
> -	unsigned long irqflags;
> -
> -	spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags);
> -
> -	/* enable DPST */
> -	mid_enable_pipe_event(dev_priv, 0);
> -	psb_irq_turn_on_dpst(dev);
> -
> -	spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);
> -	return 0;
> -}
> -
> -void psb_irq_turn_off_dpst(struct drm_device *dev)
> -{
> -	struct drm_psb_private *dev_priv =
> -	    (struct drm_psb_private *) dev->dev_private;
> -	u32 pwm_reg;
> -
> -	if (gma_power_begin(dev, false)) {
> -		PSB_WVDC32(0x00000000, HISTOGRAM_INT_CONTROL);
> -		PSB_RVDC32(HISTOGRAM_INT_CONTROL);
> -
> -		psb_disable_pipestat(dev_priv, 0, PIPE_DPST_EVENT_ENABLE);
> -
> -		pwm_reg = PSB_RVDC32(PWM_CONTROL_LOGIC);
> -		PSB_WVDC32(pwm_reg & ~PWM_PHASEIN_INT_ENABLE,
> -							PWM_CONTROL_LOGIC);
> -		pwm_reg = PSB_RVDC32(PWM_CONTROL_LOGIC);
> -
> -		gma_power_end(dev);
> -	}
> -}
> -
> -int psb_irq_disable_dpst(struct drm_device *dev)
> -{
> -	struct drm_psb_private *dev_priv =
> -	    (struct drm_psb_private *) dev->dev_private;
> -	unsigned long irqflags;
> -
> -	spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags);
> -
> -	mid_disable_pipe_event(dev_priv, 0);
> -	psb_irq_turn_off_dpst(dev);
> -
> -	spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);
> -
> -	return 0;
> -}
> -
>   /*
>    * It is used to enable VBLANK interrupt
>    */
> diff --git a/drivers/gpu/drm/gma500/psb_irq.h b/drivers/gpu/drm/gma500/psb_irq.h
> index 1b577fa7010a..17c9b0b62471 100644
> --- a/drivers/gpu/drm/gma500/psb_irq.h
> +++ b/drivers/gpu/drm/gma500/psb_irq.h
> @@ -23,10 +23,6 @@ int  psb_irq_postinstall(struct drm_device *dev);
>   void psb_irq_uninstall(struct drm_device *dev);
>   irqreturn_t psb_irq_handler(int irq, void *arg);
>   
> -int psb_irq_enable_dpst(struct drm_device *dev);
> -int psb_irq_disable_dpst(struct drm_device *dev);
> -void psb_irq_turn_on_dpst(struct drm_device *dev);
> -void psb_irq_turn_off_dpst(struct drm_device *dev);
>   int  psb_enable_vblank(struct drm_crtc *crtc);
>   void psb_disable_vblank(struct drm_crtc *crtc);
>   u32  psb_get_vblank_counter(struct drm_crtc *crtc);
> 

-- 
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
(HRB 36809, AG Nürnberg)
Geschäftsführer: Felix Imendörffer

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