[PATCH 0/3] iommu/drm/msm: Allow non-coherent masters to use system cache
Sai Prakash Ranjan
saiprakash.ranjan at codeaurora.org
Fri Jan 29 08:53:36 UTC 2021
On 2021-01-20 10:48, Sai Prakash Ranjan wrote:
> On 2021-01-11 19:45, Sai Prakash Ranjan wrote:
>> commit ecd7274fb4cd ("iommu: Remove unused IOMMU_SYS_CACHE_ONLY flag")
>> removed unused IOMMU_SYS_CACHE_ONLY prot flag and along with it went
>> the memory type setting required for the non-coherent masters to use
>> system cache. Now that system cache support for GPU is added, we will
>> need to set the right PTE attribute for GPU buffers to be sys cached.
>> Without this, the system cache lines are not allocated for GPU.
>>
>> So the patches in this series introduces a new prot flag IOMMU_LLC,
>> renames IO_PGTABLE_QUIRK_ARM_OUTER_WBWA to IO_PGTABLE_QUIRK_PTW_LLC
>> and makes GPU the user of this protection flag.
>>
>> The series slightly depends on following 2 patches posted earlier and
>> is based on msm-next branch:
>> * https://lore.kernel.org/patchwork/patch/1363008/
>> * https://lore.kernel.org/patchwork/patch/1363010/
>>
>> Sai Prakash Ranjan (3):
>> iommu/io-pgtable: Rename last-level cache quirk to
>> IO_PGTABLE_QUIRK_PTW_LLC
>> iommu/io-pgtable-arm: Add IOMMU_LLC page protection flag
>> drm/msm: Use IOMMU_LLC page protection flag to map gpu buffers
>>
>> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 3 +++
>> drivers/gpu/drm/msm/adreno/adreno_gpu.c | 2 +-
>> drivers/gpu/drm/msm/msm_iommu.c | 3 +++
>> drivers/gpu/drm/msm/msm_mmu.h | 4 ++++
>> drivers/iommu/io-pgtable-arm.c | 9 ++++++---
>> include/linux/io-pgtable.h | 6 +++---
>> include/linux/iommu.h | 6 ++++++
>> 7 files changed, 26 insertions(+), 7 deletions(-)
>>
>>
>> base-commit: 00fd44a1a4700718d5d962432b55c09820f7e709
>
>
> Gentle Ping!
>
Gentle Ping!!
Thanks,
Sai
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