[PATCH 00/12] mgag200: Refactor PLL setup

Thomas Zimmermann tzimmermann at suse.de
Mon Jul 5 12:45:03 UTC 2021


Split the PLL setup code into computation and update functions; compute
the PLL values during atomic checks, update the PLL during atomic commits;
cleanup the whole thing.

The current PLL setup code for mgag200 mixes up computation if the PLL
values and programming the HW. Both is done during atomic commits. As the
computation phase can fail, the patch splits the functions and moves
the computation to atomic-check phase. The PLL values are stores as part
of the CRTC's atomic state.

As the PLL code is currently unmaintainable, apply various cleanups. For
example, split functions that handle multiple HW revisions, constify values,
move compute and update code to distict locations, and unify the
representation of the PLL's values.

Tested on G200EH by setting modes in Weston, fbdev, and Xorg. Further
testing is welcome.

Thomas Zimmermann (12):
  drm/mgag200: Select clock in PLL update functions
  drm/mgag200: Return errno codes from PLL compute functions
  drm/mgag200: Remove P_ARRAY_SIZE
  drm/mgag200: Split PLL setup into compute and update functions
  drm/mgag200: Introduce separate variable for PLL S parameter
  drm/mgag200: Store values (not bits) in struct mgag200_pll_values
  drm/mgag200: Split several PLL functions by device type
  drm/mgag200: Separate PLL compute and update functions from each other
  drm/mgag200: Split PLL computation for G200SE
  drm/mgag200: Declare PLL clock constants static const
  drm/mgag200: Introduce custom CRTC state
  drm/mgag200: Compute PLL values during atomic check

 drivers/gpu/drm/drm_simple_kms_helper.c |  39 +-
 drivers/gpu/drm/mgag200/mgag200_drv.h   |  28 +
 drivers/gpu/drm/mgag200/mgag200_mode.c  | 965 +++++++++++++++---------
 include/drm/drm_simple_kms_helper.h     |  27 +
 4 files changed, 720 insertions(+), 339 deletions(-)

--
2.32.0



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