[Intel-gfx] [PATCH 3/3] drm/i915/uapi: Add query for L3 bank count
John Harrison
john.c.harrison at intel.com
Thu Jul 15 22:16:08 UTC 2021
On 6/16/2021 03:25, Daniel Vetter wrote:
> On Thu, Jun 10, 2021 at 10:46 PM <John.C.Harrison at intel.com> wrote:
>> From: John Harrison <John.C.Harrison at Intel.com>
>>
>> Various UMDs need to know the L3 bank count. So add a query API for it.
> Please link to both the igt test submission for this (there's not even
> a Test-with: on the cover letter)
Is there a wiki page that describes all such tags? That is not one I was
aware of and I can't find anything in the Kernel patch submission wiki
or DRM maintainers wiki that mentions it.
> and the merge requests for the
> various UMD which uses new uapi.
Is there a particular tag to use for this?
John.
> Also as other mentioned, full uapi
> kerneldoc is needed too. Please fill in any gaps in the existing docs
> that relate to your addition directly (like we've e.g. done for the
> extension chaining when adding lmem support).
>
> Thanks, Daniel
>
>> Signed-off-by: John Harrison <John.C.Harrison at Intel.com>
>> ---
>> drivers/gpu/drm/i915/gt/intel_gt.c | 15 +++++++++++++++
>> drivers/gpu/drm/i915/gt/intel_gt.h | 1 +
>> drivers/gpu/drm/i915/i915_query.c | 22 ++++++++++++++++++++++
>> drivers/gpu/drm/i915/i915_reg.h | 1 +
>> include/uapi/drm/i915_drm.h | 1 +
>> 5 files changed, 40 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
>> index 2161bf01ef8b..708bb3581d83 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
>> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
>> @@ -704,3 +704,18 @@ void intel_gt_info_print(const struct intel_gt_info *info,
>>
>> intel_sseu_dump(&info->sseu, p);
>> }
>> +
>> +int intel_gt_get_l3bank_count(struct intel_gt *gt)
>> +{
>> + struct drm_i915_private *i915 = gt->i915;
>> + intel_wakeref_t wakeref;
>> + u32 fuse3;
>> +
>> + if (GRAPHICS_VER(i915) < 12)
>> + return -ENODEV;
>> +
>> + with_intel_runtime_pm(gt->uncore->rpm, wakeref)
>> + fuse3 = intel_uncore_read(gt->uncore, GEN10_MIRROR_FUSE3);
>> +
>> + return hweight32(REG_FIELD_GET(GEN12_GT_L3_MODE_MASK, ~fuse3));
>> +}
>> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
>> index 7ec395cace69..46aa1cf4cf30 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_gt.h
>> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
>> @@ -77,6 +77,7 @@ static inline bool intel_gt_is_wedged(const struct intel_gt *gt)
>>
>> void intel_gt_info_print(const struct intel_gt_info *info,
>> struct drm_printer *p);
>> +int intel_gt_get_l3bank_count(struct intel_gt *gt);
>>
>> void intel_gt_watchdog_work(struct work_struct *work);
>>
>> diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
>> index 96bd8fb3e895..0e92bb2d21b2 100644
>> --- a/drivers/gpu/drm/i915/i915_query.c
>> +++ b/drivers/gpu/drm/i915/i915_query.c
>> @@ -10,6 +10,7 @@
>> #include "i915_perf.h"
>> #include "i915_query.h"
>> #include <uapi/drm/i915_drm.h>
>> +#include "gt/intel_gt.h"
>>
>> static int copy_query_item(void *query_hdr, size_t query_sz,
>> u32 total_length,
>> @@ -502,6 +503,26 @@ static int query_hwconfig_table(struct drm_i915_private *i915,
>> return hwconfig->size;
>> }
>>
>> +static int query_l3banks(struct drm_i915_private *i915,
>> + struct drm_i915_query_item *query_item)
>> +{
>> + u32 banks;
>> +
>> + if (query_item->length == 0)
>> + return sizeof(banks);
>> +
>> + if (query_item->length < sizeof(banks))
>> + return -EINVAL;
>> +
>> + banks = intel_gt_get_l3bank_count(&i915->gt);
>> +
>> + if (copy_to_user(u64_to_user_ptr(query_item->data_ptr),
>> + &banks, sizeof(banks)))
>> + return -EFAULT;
>> +
>> + return sizeof(banks);
>> +}
>> +
>> static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
>> struct drm_i915_query_item *query_item) = {
>> query_topology_info,
>> @@ -509,6 +530,7 @@ static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
>> query_perf_config,
>> query_memregion_info,
>> query_hwconfig_table,
>> + query_l3banks,
>> };
>>
>> int i915_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
>> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>> index eb13c601d680..e9ba88fe3db7 100644
>> --- a/drivers/gpu/drm/i915/i915_reg.h
>> +++ b/drivers/gpu/drm/i915/i915_reg.h
>> @@ -3099,6 +3099,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
>> #define GEN10_MIRROR_FUSE3 _MMIO(0x9118)
>> #define GEN10_L3BANK_PAIR_COUNT 4
>> #define GEN10_L3BANK_MASK 0x0F
>> +#define GEN12_GT_L3_MODE_MASK 0xFF
>>
>> #define GEN8_EU_DISABLE0 _MMIO(0x9134)
>> #define GEN8_EU_DIS0_S0_MASK 0xffffff
>> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
>> index 87d369cae22a..20d18cca5066 100644
>> --- a/include/uapi/drm/i915_drm.h
>> +++ b/include/uapi/drm/i915_drm.h
>> @@ -2234,6 +2234,7 @@ struct drm_i915_query_item {
>> #define DRM_I915_QUERY_PERF_CONFIG 3
>> #define DRM_I915_QUERY_MEMORY_REGIONS 4
>> #define DRM_I915_QUERY_HWCONFIG_TABLE 5
>> +#define DRM_I915_QUERY_L3_BANK_COUNT 6
>> /* Must be kept compact -- no holes and well documented */
>>
>> /**
>> --
>> 2.25.1
>>
>> _______________________________________________
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>> Intel-gfx at lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
>
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