[PATCH 01/14] drm/kmb: Enable LCD DMA for low TVDDCV

Sam Ravnborg sam at ravnborg.org
Thu Jul 29 19:00:40 UTC 2021


Hi Anitha,

On Thu, Jul 29, 2021 at 06:48:45PM +0000, Chrisanthus, Anitha wrote:
> Hi Sam,
> Please help! I tried to push the first two patches to drm-misc-fixes using dim push, but it pushed other things too besides these patches. I am sorry, don't know what went wrong.
>

I see only these in drm-misc_fixes:

ommit eb92830cdbc232a0e8166c48061ca276132646a7 (HEAD -> drm-misc-fixes, drm-misc/for-linux-next-fixes, drm-misc/drm-misc-fixes)
Author: Edmund Dea <edmund.j.dea at intel.com>
Date:   Wed Aug 26 13:17:29 2020 -0700

    drm/kmb: Define driver date and major/minor version

    Added macros for date and version

    Fixes: 7f7b96a8a0a1 ("drm/kmb: Add support for KeemBay Display")
    Signed-off-by: Edmund Dea <edmund.j.dea at intel.com>
    Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus at intel.com>
    Acked-by: Sam Ravnborg <sam at ravnborg.org>
    Link: https://patchwork.freedesktop.org/patch/msgid/20210728003126.1425028-2-anitha.chrisanthus@intel.com

commit 0aab5dce395636eddf4e5f33eba88390328a95b4
Author: Edmund Dea <edmund.j.dea at intel.com>
Date:   Tue Aug 25 14:51:17 2020 -0700

    drm/kmb: Enable LCD DMA for low TVDDCV

    There's an undocumented dependency between LCD layer enable bits [2-5]
    and the AXI pipelined read enable bit [28] in the LCD_CONTROL register.
    The proper order of operation is:

    1) Clear AXI pipelined read enable bit
    2) Set LCD layers
    3) Set AXI pipelined read enable bit

    With this update, LCD can start DMA when TVDDCV is reduced down to 700mV.

    Fixes: 7f7b96a8a0a1 ("drm/kmb: Add support for KeemBay Display")
    Signed-off-by: Edmund Dea <edmund.j.dea at intel.com>
    Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus at intel.com>
    Acked-by: Sam Ravnborg <sam at ravnborg.org>
    Link: https://patchwork.freedesktop.org/patch/msgid/20210728003126.1425028-1-anitha.chrisanthus@intel.com


Looks OK.

	Sam


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