[PATCH] drm: mxsfb: Clear FIFO_CLEAR bit
Lucas Stach
l.stach at pengutronix.de
Tue Jun 22 07:28:12 UTC 2021
Am Montag, dem 21.06.2021 um 18:30 +0200 schrieb Marek Vasut:
> On 6/21/21 2:14 PM, Lucas Stach wrote:
>
> [...]
>
> > > diff --git a/drivers/gpu/drm/mxsfb/mxsfb_kms.c b/drivers/gpu/drm/mxsfb/mxsfb_kms.c
> > > index 98d8ba0bae84..22cb749fc9bc 100644
> > > --- a/drivers/gpu/drm/mxsfb/mxsfb_kms.c
> > > +++ b/drivers/gpu/drm/mxsfb/mxsfb_kms.c
> > > @@ -241,6 +241,9 @@ static void mxsfb_crtc_mode_set_nofb(struct mxsfb_drm_private *mxsfb,
> > >
> > > /* Clear the FIFOs */
> > > writel(CTRL1_FIFO_CLEAR, mxsfb->base + LCDC_CTRL1 + REG_SET);
> > > + readl(mxsfb->base + LCDC_CTRL1);
> >
> > Do you really need those readbacks? As both writes are targeting the
> > same slave interface, the memory barrier in the clear write should push
> > the set write.
>
> What would push the clear write then ? We can drop one of the readl()s,
> but not the last one.
There are a lot of more writes with barriers to the controller slave
interface in that function after clearing the FIFO. I don't see why
this readback would be required.
Regards,
Lucas
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