[PATCH] drm/ttm: ioremap buffer according to TTM mem caching setting

Christian König ckoenig.leichtzumerken at gmail.com
Thu Mar 4 18:05:53 UTC 2021



Am 04.03.21 um 18:40 schrieb Bhardwaj, Rajneesh:
>
> On 3/4/2021 12:31 PM, Christian König wrote:
>> [CAUTION: External Email]
>>
>> Am 04.03.21 um 18:01 schrieb Bhardwaj, Rajneesh:
>>> I was wondering if a managed version of such API exists but looks like
>>> none. We only have devm_ioremap_wc but that is valid only for
>>> PAGE_CACHE_MODE_WC whereas ioremap_cache uses _WB. One more small
>>> comment below.
>>>
>>>
>>> Acked-by: Rajneesh Bhardwaj <rajneesh.bhardwaj at amd.com>
>>>
>>> On 3/4/2021 11:04 AM, Oak Zeng wrote:
>>>> If tbo.mem.bus.caching is cached, buffer is intended to be mapped
>>>> as cached from CPU. Map it with ioremap_cache.
>>>>
>>>> This wasn't necessary before as device memory was never mapped
>>>> as cached from CPU side. It becomes necessary for aldebaran as
>>>> device memory is mapped cached from CPU.
>>>>
>>>> Signed-off-by: Oak Zeng <Oak.Zeng at amd.com>
>>>> Reviewed-by: Christian Konig <Christian.Koenig at amd.com>
>>>> ---
>>>>   drivers/gpu/drm/ttm/ttm_bo_util.c | 14 ++++++++++++++
>>>>   1 file changed, 14 insertions(+)
>>>>
>>>> diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c
>>>> b/drivers/gpu/drm/ttm/ttm_bo_util.c
>>>> index 031e581..7429464 100644
>>>> --- a/drivers/gpu/drm/ttm/ttm_bo_util.c
>>>> +++ b/drivers/gpu/drm/ttm/ttm_bo_util.c
>>>> @@ -91,6 +91,10 @@ static int ttm_resource_ioremap(struct ttm_device
>>>> *bdev,
>>>>             if (mem->bus.caching == ttm_write_combined)
>>>>               addr = ioremap_wc(mem->bus.offset, bus_size);
>>>> +#ifdef CONFIG_X86
>>>
>>>
>>> Please use #if defined (CONFIG_X86)
>>
>> Actually #ifdef is usually preferred.
>
> oops, i was referring to IS_ENABLED (CONFIG) and not if defined.

Well, that is indeed a good idea for most config options.

But in this case #ifdef alone should work as well.

Christian.

>
>
>>
>> Christian.
>>
>>>
>>>> +        else if (mem->bus.caching == ttm_cached)
>>>> +            addr = ioremap_cache(mem->bus.offset, bus_size);
>>>> +#endif
>>>>           else
>>>>               addr = ioremap(mem->bus.offset, bus_size);
>>>>           if (!addr) {
>>>> @@ -372,6 +376,11 @@ static int ttm_bo_ioremap(struct
>>>> ttm_buffer_object *bo,
>>>>           if (mem->bus.caching == ttm_write_combined)
>>>>               map->virtual = ioremap_wc(bo->mem.bus.offset + offset,
>>>>                             size);
>>>> +#ifdef CONFIG_X86
>>>> +        else if (mem->bus.caching == ttm_cached)
>>>> +            map->virtual = ioremap_cache(bo->mem.bus.offset + offset,
>>>> +                          size);
>>>> +#endif
>>>>           else
>>>>               map->virtual = ioremap(bo->mem.bus.offset + offset,
>>>>                              size);
>>>> @@ -490,6 +499,11 @@ int ttm_bo_vmap(struct ttm_buffer_object *bo,
>>>> struct dma_buf_map *map)
>>>>           else if (mem->bus.caching == ttm_write_combined)
>>>>               vaddr_iomem = ioremap_wc(mem->bus.offset,
>>>>                            bo->base.size);
>>>> +        else if (mem->bus.caching == ttm_cached)
>>>> +#ifdef CONFIG_X86
>>>> +            vaddr_iomem = ioremap_cache(mem->bus.offset,
>>>> +                          bo->base.size);
>>>> +#endif
>>>>           else
>>>>               vaddr_iomem = ioremap(mem->bus.offset, bo->base.size);
>>> _______________________________________________
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>>



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