[PATCH v3 0/5] phy: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode support

[Liu Ying]

On Fri, 2021-03-05 at 16:22 +0100, Robert Foss wrote:
> Hey Liu,
> 
> Looking at this series[1], all but patch#2 has been reviewed, and #2
> looks good to me. So I think this series is ready to have v4 re-spun
> and and all of the r-bs from v3 added to the relevant patches.

Will respin this series soon with all R-b tags added.

Thanks,
Liu Ying

> 
> [1] https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.kernel.org%2Fproject%2Fdri-devel%2Fcover%2F1607651182-12307-1-git-send-email-victor.liu%40nxp.com%2F&data=04%7C01%7Cvictor.liu%40nxp.com%7C36731aa7c5f949c44d0008d8dfea79db%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637505545446542467%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=T5JcZt9YDHHyH%2FCf02ErQZ5rn3qp3N5jayxk9It4knM%3D&reserved=0
> 
> On Fri, 19 Feb 2021 at 10:22, Liu Ying <victor.liu at nxp.com> wrote:
> > A gentle ping.
> > 
> > Vinod, Kishon, it would be nice if you may help review this.
> > 
> > Thanks,
> > Liu Ying
> > 
> > On Fri, 2020-12-11 at 09:46 +0800, Liu Ying wrote:
> > > Hi,
> > > 
> > > This series adds i.MX8qxp LVDS PHY mode support for the Mixel PHY in the
> > > Freescale i.MX8qxp SoC.
> > > 
> > > The Mixel PHY is MIPI DPHY + LVDS PHY combo, which can works in either
> > > MIPI DPHY mode or LVDS PHY mode.  The PHY mode is controlled by i.MX8qxp
> > > SCU firmware.  The PHY driver would call a SCU function to configure the
> > > mode.
> > > 
> > > The PHY driver is already supporting the Mixel MIPI DPHY in i.MX8mq SoC,
> > > where it appears to be a single MIPI DPHY.
> > > 
> > > 
> > > Patch 1/5 sets PHY mode in the Northwest Logic MIPI DSI host controller
> > > bridge driver, since i.MX8qxp SoC embeds this controller IP to support
> > > MIPI DSI displays together with the Mixel PHY.
> > > 
> > > Patch 2/5 allows LVDS PHYs to be configured through the generic PHY functions
> > > and through a custom structure added to the generic PHY configuration union.
> > > 
> > > Patch 3/5 converts mixel,mipi-dsi-phy plain text dt binding to json-schema.
> > > 
> > > Patch 4/5 adds dt binding support for the Mixel combo PHY in i.MX8qxp SoC.
> > > 
> > > Patch 5/5 adds the i.MX8qxp LVDS PHY mode support in the Mixel PHY driver.
> > > 
> > > 
> > > Welcome comments, thanks.
> > > 
> > > v2->v3:
> > > * Improve readability of mixel_dphy_set_mode() in the Mixel PHY driver. (Guido)
> > > * Improve the 'clock-names' property in the PHY dt binding.
> > > 
> > > v1->v2:
> > > * Convert mixel,mipi-dsi-phy plain text dt binding to json-schema. (Guido)
> > > * Print invalid PHY mode in dmesg from the Mixel PHY driver. (Guido)
> > > * Add Guido's R-b tag on the patch for the nwl-dsi drm bridge driver.
> > > 
> > > Liu Ying (5):
> > >   drm/bridge: nwl-dsi: Set PHY mode in nwl_dsi_enable()
> > >   phy: Add LVDS configuration options
> > >   dt-bindings: phy: Convert mixel,mipi-dsi-phy to json-schema
> > >   dt-bindings: phy: mixel: mipi-dsi-phy: Add Mixel combo PHY support for
> > >     i.MX8qxp
> > >   phy: freescale: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode
> > >     support
> > > 
> > >  .../devicetree/bindings/phy/mixel,mipi-dsi-phy.txt |  29 ---
> > >  .../bindings/phy/mixel,mipi-dsi-phy.yaml           | 107 ++++++++
> > >  drivers/gpu/drm/bridge/nwl-dsi.c                   |   6 +
> > >  drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c     | 269 ++++++++++++++++++++-
> > >  include/linux/phy/phy-lvds.h                       |  48 ++++
> > >  include/linux/phy/phy.h                            |   4 +
> > >  6 files changed, 423 insertions(+), 40 deletions(-)
> > >  delete mode 100644 Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt
> > >  create mode 100644 Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.yaml
> > >  create mode 100644 include/linux/phy/phy-lvds.h
> > >