[pull] amdgpu, amdkfd, radeon drm-next-5.12

Dave Airlie airlied at gmail.com
Wed Mar 31 20:56:09 UTC 2021


I think this is due to this pull, on arm32.

/home/airlied/devel/kernel/dim/src/drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_srv.c:
In function ‘dmub_srv_hw_init’:
/home/airlied/devel/kernel/dim/src/drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_srv.c:519:44:
warning: cast from pointer to integer of different size
[-Wpointer-to-int-cast]
  outbox0_rb_params.base_address = (void
*)((uint64_t)(tracebuff_fb->cpu_addr) + TRACE_BUFFER_ENTRY_OFFSET);
                                            ^
/home/airlied/devel/kernel/dim/src/drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_srv.c:519:35:
warning: cast to pointer from integer of different size
[-Wint-to-pointer-cast]
  outbox0_rb_params.base_address = (void
*)((uint64_t)(tracebuff_fb->cpu_addr) + TRACE_BUFFER_ENTRY_OFFSET);

Dave.

On Sat, 27 Mar 2021 at 05:16, Zhuo, Qingqing <Qingqing.Zhuo at amd.com> wrote:
>
> [AMD Public Use]
>
> On Thu, Feb 18, 2021 at 11:15 PM Alex Deucher <alexdeucher at gmail.com> wrote:
> >>
> >> Hi Dave, Daniel,
> >>
> >> Fixes for 5.12.
> >>
> >> The following changes since commit 4c3a3292730c56591472717d8c5c0faf74f6c6bb:
> >>
> >>   drm/amd/display: fix unused variable warning (2021-02-05 09:49:44
> >> +1000)
> >>
> >> are available in the Git repository at:
> >>
> >>
> >> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitl
> >> ab.freedesktop.org%2Fagd5f%2Flinux.git&data=04%7C01%7Cqingqing.zhu
> >> o%40amd.com%7Cce0d1ee6a18b4a95366008d8f082048e%7C3dd8961fe4884e608e11a
> >> 82d994e183d%7C0%7C0%7C637523789263486288%7CUnknown%7CTWFpbGZsb3d8eyJWI
> >> joiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&a
> >> mp;sdata=Ig3OkPN0X8OtCOHDJqV%2FZSEOsL7gPs8OMh9sXDniR2w%3D&reserved
> >> =0 tags/amd-drm-next-5.12-2021-02-18
> >>
> >> for you to fetch changes up to 6e80fb8ab04f6c4f377e2fd422bdd1855beb7371:
> >>
> >>   drm/amdgpu: Set reference clock to 100Mhz on Renoir (v2) (2021-02-18
> >> 16:43:09 -0500)
>
> > Pulled into drm-next, with some conflicts, please double-check.
>
> > I also spotted
>
> > commit ea3b4242bc9ca197762119382b37e125815bd67f
> > Author: Qingqing Zhuo <qingqing.zhuo at amd.com>
> > Date:   Tue Feb 9 16:36:41 2021 -0500
>
> >   drm/amd/display: Fix system hang after multiple hotplugs (v3)
>
> > I think it would be good if that could use the drm_vblank_work stuff from Lyude instead of hand-rolling your own.
> > -Daniel
>
> Hi Daniel,
>
> Thank you for the suggestion! I need to look into further and will do so as soon as I have bandwidth.
>
> Thanks,
> Lillian
>
> >>
> >> ----------------------------------------------------------------
> >> amd-drm-next-5.12-2021-02-18:
> >>
> >> amdgpu:
> >> - Prefer Bhawan's unused variable fix
> >> - Fixes for high priority queues on gfx8,9
> >> - swSMU fixes for sienna cichlid
> >> - swSMU fixes for renoir
> >> - mmhub client id fixes for arcturus
> >> - SMUIO fixes for navi family
> >> - swSMU fixes for vangogh
> >> - GPU reset cleanup
> >> - Display fixes
> >> - GFX harvesting fix for sienna cichlid
> >> - Fix reference clock on Renoir
> >> - Misc fixes and cleanups
> >>
> >> amdkfd:
> >> - Fix for unique id query
> >> - Fix recursive lock warnings
> >>
> >> radeon:
> >> - Remove confusing VCE messages on Oland
> >>
> >> ----------------------------------------------------------------
> >> Alex Deucher (16):
> >>       Revert "drm/amd/display: fix unused variable warning"
> >>       drm/amdgpu/smu12: fix power reporting on renoir
> >>       drm/amdgpu/gmc9: fix mmhub client mapping for arcturus
> >>       drm/amdgpu/si: minor clean up of reset code
> >>       drm/amdgpu/cik: minor clean up of reset code
> >>       drm/amdgpu/vi: minor clean up of reset code
> >>       drm/amdgpu: add generic pci reset as an option
> >>       drm/amdgpu/si: add PCI reset support
> >>       drm/amdgpu/soc15: add PCI reset support
> >>       drm/amdgpu/nv: add PCI reset support
> >>       drm/amdgpu: drop extra drm_kms_helper_poll_enable/disable calls
> >>       drm/amdgpu: use runpm flag rather than fbcon for kfd runtime suspend (v2)
> >>       drm/amdgpu: reset runpm flag if device suspend fails
> >>       Revert "drm/amd/display: Update NV1x SR latency values"
> >>       drm/radeon: OLAND boards don't have VCE
> >>       drm/amdgpu: Set reference clock to 100Mhz on Renoir (v2)
> >>
> >> Anthony Koo (1):
> >>       drm/amd/display: [FW Promotion] Release 0.0.51
> >>
> >> Aric Cyr (1):
> >>       drm/amd/display: 3.2.122
> >>
> >> Bhawanpreet Lakha (1):
> >>       drm/amd/display: Fix unused variable warning
> >>
> >> Dale Zhao (1):
> >>       drm/amd/display: fix type mismatch error for return variable
> >>
> >> Derek Lai (1):
> >>       drm/amd/display: Add DIG_CLOCK_PATTERN in the transmitter
> >> control
> >>
> >> Eric Yang (1):
> >>       drm/amd/display: move edp sink present detection to hw init
> >>
> >> Fangzhi Zuo (1):
> >>       drm/amd/display: Add return code instead of boolean for future
> >> use
> >>
> >> Felix Kuehling (1):
> >>       drm/amdkfd: Fix recursive lock warnings
> >>
> >> Gustavo A. R. Silva (1):
> >>       drm/amd/display: Fix potential integer overflow
> >>
> >> Jan Kokemüller (1):
> >>       drm/amd/display: Add FPU wrappers to dcn21_validate_bandwidth()
> >>
> >> Jiapeng Chong (2):
> >>       drm/amd/display: Simplify bool comparison
> >>       drm/radeon: Simplify bool comparison
> >>
> >> Jiawei Gu (1):
> >>       drm/amdgpu: extend MAX_KIQ_REG_TRY to 1000
> >>
> >> Jun Lei (1):
> >>       drm/amd/display: revert support for DID2.0 dsc passthrough
> >>
> >> Kenneth Feng (3):
> >>       drm/amd/pm: enable ACDC feature
> >>       drm/amd/pm: enable DCS
> >>       drm/amd/pm: enable LCLK DS
> >>
> >> Kent Russell (1):
> >>       drm/amdkfd: Get unique_id dynamically v2
> >>
> >> Kevin Wang (2):
> >>       drm/amd/pm/swsmu: unify the init soft gpu metrics function
> >>       drm/amdgpu: optimize list operation in amdgpu_xgmi
> >>
> >> Lang Yu (1):
> >>       drm/amd/display: fix 64bit division issue on 32bit OS
> >>
> >> Likun Gao (5):
> >>       drm/amdgpu: support ASPM for some specific ASIC
> >>       drm/amdgpu: add SMUIO 11.0.6 register headers
> >>       drm/amdgpu: implement smuio v11_0_6 callbacks
> >>       drm/amdgpu: switch to use smuio callbacks for NV family
> >>       drm/amdgpu: support rom clockgating related function for NV
> >> family
> >>
> >> Marek Olšák (1):
> >>       drm/amdgpu: fix CGTS_TCC_DISABLE register offset on gfx10.3
> >>
> >> Nirmoy Das (6):
> >>       drm/amdgpu: cleanup struct amdgpu_ring
> >>       drm/amdgpu: enable only one high prio compute queue
> >>       drm/amdgpu: add wave limit functionality for gfx8,9
> >>       drm/amdgpu: enable gfx wave limiting for high priority compute jobs
> >>       drm/amdgpu: enable wave limit on non high prio cs pipes
> >>       drm/amdgpu/display: remove hdcp_srm sysfs on device removal
> >>
> >> Qingqing Zhuo (1):
> >>       drm/amd/display: DP HDCP Compliance 1A-08/09 tests fail
> >>
> >> Tao Zhou (1):
> >>       drm/amdgpu: enable gpu recovery for dimgrey_cavefish
> >>
> >> Tian Tao (1):
> >>       drm/amdgpu: fix unnecessary NULL check warnings
> >>
> >> Wayne Lin (2):
> >>       drm/amdgpu: Add otg vertical IRQ Source
> >>       drm/amd/display: Add otg vertical interrupt0 support in DCN1.0
> >>
> >> Wesley Chalmers (1):
> >>       drm/amd/display: DIO Supported for virtual displays
> >>
> >> Wyatt Wood (1):
> >>       drm/amd/display: Initialize dmub_rb_cmd unions to 0
> >>
> >> Xiaojian Du (1):
> >>       drm/amd/pm: make the error log more clear for fine grain tuning
> >> function
> >>
> >> Xiaomeng Hou (3):
> >>       drm/amd/pm: update the smu v11.5 smc header for vangogh
> >>       drm/amd/pm: modify the power limit level parameter from bool to enum type
> >>       drm/amd/pm: add support for hwmon control of slow and fast PPT
> >> limit on vangogh
> >>
> >>  drivers/gpu/drm/amd/amdgpu/Makefile                |   3 +-
> >>  drivers/gpu/drm/amd/amdgpu/amdgpu.h                |   7 +-
> >>  drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c             |   3 +-
> >>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c         |  19 +++-
> >>  drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c            |  18 ++--
> >>  drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c            |  15 +--
> >>  drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h            |   2 +-
> >>  drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c             |   9 ++
> >>  drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h           |   1 +
> >>  drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c           |   8 +-
> >>  drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h           |   7 +-
> >>  drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c           |  10 +-
> >>  drivers/gpu/drm/amd/amdgpu/cik.c                   |  33 ++----
> >>  drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c             |  28 +++--
> >>  drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c              |  72 ++++++++++++-
> >>  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c              |  72 +++++++++++--
> >>  drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c              |  66 ++++++------
> >>  drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c             | 114 ++++++++++++++++++++
> >>  drivers/gpu/drm/amd/amdgpu/nv.c                    |  44 ++++++--
> >>  drivers/gpu/drm/amd/amdgpu/si.c                    |  42 ++++----
> >>  drivers/gpu/drm/amd/amdgpu/smuio_v11_0_6.c         |  77 +++++++++++++
> >>  drivers/gpu/drm/amd/amdgpu/smuio_v11_0_6.h         |  30 ++++++
> >>  drivers/gpu/drm/amd/amdgpu/soc15.c                 |  26 +++--
> >>  drivers/gpu/drm/amd/amdgpu/vi.c                    |  36 +++----
> >>  .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.h  |   4 +-
> >>  drivers/gpu/drm/amd/amdkfd/kfd_topology.c          |   6 +-
> >>  drivers/gpu/drm/amd/amdkfd/kfd_topology.h          |   1 -
> >>  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c  |   6 +-
> >>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c |   3 +-
> >>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.h |   2 +-
> >>  .../drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c  |   8 +-
> >>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c  |  22 ++++
> >>  drivers/gpu/drm/amd/display/dc/core/dc.c           |  40 +++----
> >>  drivers/gpu/drm/amd/display/dc/core/dc_link.c      |   4 +-
> >>  drivers/gpu/drm/amd/display/dc/dc.h                |   2 +-
> >>  drivers/gpu/drm/amd/display/dc/dc_dsc.h            |   7 +-
> >>  drivers/gpu/drm/amd/display/dc/dc_hw_types.h       |   1 -
> >>  drivers/gpu/drm/amd/display/dc/dc_link.h           |   2 +
> >>  .../gpu/drm/amd/display/dc/dce/dce_clock_source.c  |   2 +-
> >>  drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c      |   3 +
> >>  .../gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.c  |   3 +-
> >>  drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c      |   6 +-
> >>  .../display/dc/dcn10/dcn10_hw_sequencer_debug.c    |   2 +-
> >>  .../drm/amd/display/dc/dcn10/dcn10_link_encoder.c  |  15 +++
> >> .../drm/amd/display/dc/dcn10/dcn10_link_encoder.h  |  11 ++
> >>  .../drm/amd/display/dc/dcn20/dcn20_link_encoder.c  |   2 +-
> >>  .../gpu/drm/amd/display/dc/dcn20/dcn20_resource.c  |  11 +-
> >>  drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hwseq.c |   4 +-
> >>  .../gpu/drm/amd/display/dc/dcn21/dcn21_resource.c  |  20 +++-
> >>  .../amd/display/dc/dml/dcn20/display_mode_vba_20.c |   7 +-
> >>  .../display/dc/dml/dcn20/display_mode_vba_20v2.c   |   7 +-
> >>  .../amd/display/dc/dml/dcn21/display_mode_vba_21.c |   7 +-
> >>  .../amd/display/dc/dml/dcn30/display_mode_vba_30.c |   2 +-
> >>  .../drm/amd/display/dc/dml/display_mode_structs.h  |   1 +
> >>  .../gpu/drm/amd/display/dc/dml/display_mode_vba.c  |   2 +
> >>  .../gpu/drm/amd/display/dc/dml/display_mode_vba.h  |   1 +
> >>  drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c        |  29 ++---
> >>  .../drm/amd/display/dc/inc/hw/clk_mgr_internal.h   |   4 +-
> >>  .../amd/display/dc/irq/dcn10/irq_service_dcn10.c   |  31 ++++++
> >>  drivers/gpu/drm/amd/display/dc/irq_types.h         |   1 +
> >>  drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h    |  29 ++++-
> >>  .../gpu/drm/amd/display/modules/hdcp/hdcp_psp.c    |   2 +
> >>  drivers/gpu/drm/amd/include/amd_shared.h           |   1 +
> >>  .../include/asic_reg/smuio/smuio_11_0_6_offset.h   |  35 ++++++
> >>  .../include/asic_reg/smuio/smuio_11_0_6_sh_mask.h  |  41 +++++++
> >>  drivers/gpu/drm/amd/pm/amdgpu_pm.c                 |  49 +++++++--
> >>  drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h            |  21 +++-
> >>  drivers/gpu/drm/amd/pm/inc/smu_types.h             |   4 +
> >>  drivers/gpu/drm/amd/pm/inc/smu_v11_0.h             |  13 ++-
> >>  drivers/gpu/drm/amd/pm/inc/smu_v11_5_ppsmc.h       |   6 +-
> >>  drivers/gpu/drm/amd/pm/inc/smu_v12_0.h             |   2 -
> >>  .../gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c   |   2 +-
> >>  drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c          |  30 +++++-
> >>  drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c  |   4 +-
> >>  drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c    |   4 +-
> >>  .../drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c    |  15 ++-
> >>  drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c     |  32 +-----
> >>  drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c   | 120 ++++++++++++++++++++-
> >>  drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c    |   9 +-
> >>  drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c     |  12 ---
> >>  drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c             |  28 +++++
> >>  drivers/gpu/drm/amd/pm/swsmu/smu_cmn.h             |   2 +
> >>  drivers/gpu/drm/radeon/radeon_asic.c               |   3 +
> >>  drivers/gpu/drm/radeon/radeon_vce.c                |   1 -
> >>  drivers/gpu/drm/radeon/rs690.c                     |   2 +-
> >>  drivers/gpu/drm/radeon/vce_v1_0.c                  |   1 -
> >>  86 files changed, 1147 insertions(+), 342 deletions(-)  create mode
> >> 100644 drivers/gpu/drm/amd/amdgpu/smuio_v11_0_6.c
> >>  create mode 100644 drivers/gpu/drm/amd/amdgpu/smuio_v11_0_6.h
> >>  create mode 100644
> >> drivers/gpu/drm/amd/include/asic_reg/smuio/smuio_11_0_6_offset.h
> >>  create mode 100644
> >> drivers/gpu/drm/amd/include/asic_reg/smuio/smuio_11_0_6_sh_mask.h
>
>
>
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> https://nam11.safelinks.protection.outlook.com/?url=http%3A%2F%2Fblog.ffwll.ch%2F&data=04%7C01%7Cqingqing.zhuo%40amd.com%7Cce0d1ee6a18b4a95366008d8f082048e%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637523789263486288%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=0U7l7fCO57FF7kUPI4tzQFTyLvMhSE%2FELR3D1xf6hcY%3D&reserved=0


More information about the dri-devel mailing list