[PATCH] drm/msm/dpu: simplify dpu_core_irq_en/disable helpers
Dmitry Baryshkov
dmitry.baryshkov at linaro.org
Sun May 16 20:27:38 UTC 2021
On 11/05/2021 17:15, Dmitry Baryshkov wrote:
> dpu_core_irq_en/disable helpers are always called with the irq_count
> equal to 1. Merge them with _dpu_core_en/disable functions and make them
> handle just one interrupt index at a time.
Replacing this patch with the squashing enable/disable into
register/unregister (part of DPU IRQ rework patchset v2).
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c | 50 ++++----------------
> drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h | 20 ++++----
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 4 +-
> 3 files changed, 18 insertions(+), 56 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
> index c10761ea191c..0ee9ac21e24a 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c
> @@ -63,11 +63,11 @@ int dpu_core_irq_idx_lookup(struct dpu_kms *dpu_kms,
> }
>
> /**
> - * _dpu_core_irq_enable - enable core interrupt given by the index
> + * dpu_core_irq_enable - enable core interrupt given by the index
> * @dpu_kms: Pointer to dpu kms context
> * @irq_idx: interrupt index
> */
> -static int _dpu_core_irq_enable(struct dpu_kms *dpu_kms, int irq_idx)
> +int dpu_core_irq_enable(struct dpu_kms *dpu_kms, int irq_idx)
> {
> unsigned long irq_flags;
> int ret = 0, enable_count;
> @@ -85,6 +85,8 @@ static int _dpu_core_irq_enable(struct dpu_kms *dpu_kms, int irq_idx)
> }
>
> enable_count = atomic_read(&dpu_kms->irq_obj.enable_counts[irq_idx]);
> + if (enable_count)
> + DRM_ERROR("irq_idx=%d enable_count=%d\n", irq_idx, enable_count);
> DRM_DEBUG_KMS("irq_idx=%d enable_count=%d\n", irq_idx, enable_count);
> trace_dpu_core_irq_enable_idx(irq_idx, enable_count);
>
> @@ -109,31 +111,12 @@ static int _dpu_core_irq_enable(struct dpu_kms *dpu_kms, int irq_idx)
> return ret;
> }
>
> -int dpu_core_irq_enable(struct dpu_kms *dpu_kms, int *irq_idxs, u32 irq_count)
> -{
> - int i, ret = 0, counts;
> -
> - if (!irq_idxs || !irq_count) {
> - DPU_ERROR("invalid params\n");
> - return -EINVAL;
> - }
> -
> - counts = atomic_read(&dpu_kms->irq_obj.enable_counts[irq_idxs[0]]);
> - if (counts)
> - DRM_ERROR("irq_idx=%d enable_count=%d\n", irq_idxs[0], counts);
> -
> - for (i = 0; (i < irq_count) && !ret; i++)
> - ret = _dpu_core_irq_enable(dpu_kms, irq_idxs[i]);
> -
> - return ret;
> -}
> -
> /**
> - * _dpu_core_irq_disable - disable core interrupt given by the index
> + * dpu_core_irq_disable - disable core interrupt given by the index
> * @dpu_kms: Pointer to dpu kms context
> * @irq_idx: interrupt index
> */
> -static int _dpu_core_irq_disable(struct dpu_kms *dpu_kms, int irq_idx)
> +int dpu_core_irq_disable(struct dpu_kms *dpu_kms, int irq_idx)
> {
> int ret = 0, enable_count;
>
> @@ -148,6 +131,8 @@ static int _dpu_core_irq_disable(struct dpu_kms *dpu_kms, int irq_idx)
> }
>
> enable_count = atomic_read(&dpu_kms->irq_obj.enable_counts[irq_idx]);
> + if (enable_count > 1)
> + DRM_ERROR("irq_idx=%d enable_count=%d\n", irq_idx, enable_count);
> DRM_DEBUG_KMS("irq_idx=%d enable_count=%d\n", irq_idx, enable_count);
> trace_dpu_core_irq_disable_idx(irq_idx, enable_count);
>
> @@ -164,25 +149,6 @@ static int _dpu_core_irq_disable(struct dpu_kms *dpu_kms, int irq_idx)
> return ret;
> }
>
> -int dpu_core_irq_disable(struct dpu_kms *dpu_kms, int *irq_idxs, u32 irq_count)
> -{
> - int i, ret = 0, counts;
> -
> - if (!irq_idxs || !irq_count) {
> - DPU_ERROR("invalid params\n");
> - return -EINVAL;
> - }
> -
> - counts = atomic_read(&dpu_kms->irq_obj.enable_counts[irq_idxs[0]]);
> - if (counts == 2)
> - DRM_ERROR("irq_idx=%d enable_count=%d\n", irq_idxs[0], counts);
> -
> - for (i = 0; (i < irq_count) && !ret; i++)
> - ret = _dpu_core_irq_disable(dpu_kms, irq_idxs[i]);
> -
> - return ret;
> -}
> -
> u32 dpu_core_irq_read(struct dpu_kms *dpu_kms, int irq_idx, bool clear)
> {
> if (!dpu_kms->hw_intr)
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h
> index e30775e6585b..2ac781738e83 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h
> @@ -43,34 +43,30 @@ int dpu_core_irq_idx_lookup(
> uint32_t instance_idx);
>
> /**
> - * dpu_core_irq_enable - IRQ helper function for enabling one or more IRQs
> + * dpu_core_irq_enable - IRQ helper function for enabling IRQ
> * @dpu_kms: DPU handle
> - * @irq_idxs: Array of irq index
> - * @irq_count: Number of irq_idx provided in the array
> + * @irq_idx: irq index
> * @return: 0 for success enabling IRQ, otherwise failure
> *
> * This function increments count on each enable and decrements on each
> - * disable. Interrupts is enabled if count is 0 before increment.
> + * disable. Interrupt is enabled if count is 0 before increment.
> */
> int dpu_core_irq_enable(
> struct dpu_kms *dpu_kms,
> - int *irq_idxs,
> - uint32_t irq_count);
> + int irq_idxs);
>
> /**
> - * dpu_core_irq_disable - IRQ helper function for disabling one of more IRQs
> + * dpu_core_irq_disable - IRQ helper function for disabling IRQ
> * @dpu_kms: DPU handle
> - * @irq_idxs: Array of irq index
> - * @irq_count: Number of irq_idx provided in the array
> + * @irq_idx: irq index
> * @return: 0 for success disabling IRQ, otherwise failure
> *
> * This function increments count on each enable and decrements on each
> - * disable. Interrupts is disabled if count is 0 after decrement.
> + * disable. Interrupt is disabled if count is 0 after decrement.
> */
> int dpu_core_irq_disable(
> struct dpu_kms *dpu_kms,
> - int *irq_idxs,
> - uint32_t irq_count);
> + int irq_idxs);
>
> /**
> * dpu_core_irq_read - IRQ helper function for reading IRQ status
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index 72eb245341bf..e365815e6e28 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -367,7 +367,7 @@ int dpu_encoder_helper_register_irq(struct dpu_encoder_phys *phys_enc,
> return ret;
> }
>
> - ret = dpu_core_irq_enable(phys_enc->dpu_kms, &irq->irq_idx, 1);
> + ret = dpu_core_irq_enable(phys_enc->dpu_kms, irq->irq_idx);
> if (ret) {
> DRM_ERROR("enable failed id=%u, intr=%d, hw=%d, irq=%d",
> DRMID(phys_enc->parent), intr_idx, irq->hw_idx,
> @@ -400,7 +400,7 @@ int dpu_encoder_helper_unregister_irq(struct dpu_encoder_phys *phys_enc,
> return 0;
> }
>
> - ret = dpu_core_irq_disable(phys_enc->dpu_kms, &irq->irq_idx, 1);
> + ret = dpu_core_irq_disable(phys_enc->dpu_kms, irq->irq_idx);
> if (ret) {
> DRM_ERROR("disable failed id=%u, intr=%d, hw=%d, irq=%d ret=%d",
> DRMID(phys_enc->parent), intr_idx, irq->hw_idx,
>
--
With best wishes
Dmitry
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