[PATCH v5 5/7] MIPS: DTS: jz4780: Account for Synopsys HDMI driver and LCD controllers
H. Nikolaus Schaller
hns at goldelico.com
Tue Nov 9 20:19:17 UTC 2021
Hi Paul,
> Am 07.11.2021 um 20:05 schrieb Paul Cercueil <paul at crapouillou.net>:
>
>> 6. Therefore I think it *may* work overclocked with 48MHz
>> but is not guaranteed or reliable above 27 MHz.
>> So everything is ok here.
>
> One thing though - the "assigned-clocks" and "assigned-clock-rates", while it works here, should be moved to the CGU node, to respect the YAML schemas.
Trying to do this seems to break boot.
I can boot up to
[ 8.312926] dw-hdmi-ingenic 10180000.hdmi: registered DesignWare HDMI I2C bus driver
and
[ 11.366899] [drm] Initialized ingenic-drm 1.1.0 20200716 for 13050000.lcdc0 on minor 0
but then the boot process becomes slow and hangs. Last sign of activity is
[ 19.347659] hub 1-0:1.0: USB hub found
[ 19.353478] hub 1-0:1.0: 1 port detected
[ 32.321760] wlan0_power: disabling
What I did was to just move
assigned-clocks = <&cgu JZ4780_CLK_HDMI>;
assigned-clock-rates = <27000000>;
from
hdmi: hdmi at 10180000 {
to
cgu: jz4780-cgu at 10000000 {
Does this mean the clock is assigned too early or too late?
Do you have any suggestions since I don't know the details of CGU.
BR and thanks,
Nikolaus
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