[PATCH v2 6/6] drm/msm/a6xx: Add a few gmu buffers to coredump

[kernel test robot]

Hi Akhil,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm/drm-next]
[also build test WARNING on drm-intel/for-linux-next drm-tip/drm-tip v5.16-rc2 next-20211124]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Akhil-P-Oommen/drm-msm-Increase-gpu-boost-interval/20211124-052303
base:   git://anongit.freedesktop.org/drm/drm drm-next
config: xtensa-allyesconfig (https://download.01.org/0day-ci/archive/20211124/202111241604.cGzD1KB0-lkp@intel.com/config)
compiler: xtensa-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/9bb31a2940567b37d0eead980d4bef5f4cef7d24
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Akhil-P-Oommen/drm-msm-Increase-gpu-boost-interval/20211124-052303
        git checkout 9bb31a2940567b37d0eead980d4bef5f4cef7d24
        # save the config file to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross ARCH=xtensa 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp at intel.com>

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:1244:6: warning: no previous prototype for 'a6xx_gmu_show' [-Wmissing-prototypes]
    1244 | void a6xx_gmu_show(struct a6xx_gmu_state *gmu_state, struct drm_printer *p)
         |      ^~~~~~~~~~~~~


vim +/a6xx_gmu_show +1244 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

  1243	
> 1244	void a6xx_gmu_show(struct a6xx_gmu_state *gmu_state, struct drm_printer *p)
  1245	{
  1246		int i;
  1247	
  1248		drm_puts(p, "gmu-log:\n");
  1249		if (gmu_state->log_bo) {
  1250			struct msm_gpu_state_bo *log_bo = gmu_state->log_bo;
  1251	
  1252			drm_printf(p, "    iova: 0x%016llx\n", log_bo->iova);
  1253			drm_printf(p, "    size: %zu\n", log_bo->size);
  1254			adreno_show_object(p, &log_bo->data, log_bo->size,
  1255					&log_bo->encoded);
  1256		}
  1257	
  1258		drm_puts(p, "gmu-hfi:\n");
  1259		if (gmu_state->hfi_bo) {
  1260			struct msm_gpu_state_bo *hfi_bo = gmu_state->hfi_bo;
  1261	
  1262			drm_printf(p, "    iova: 0x%016llx\n", hfi_bo->iova);
  1263			drm_printf(p, "    size: %zu\n", hfi_bo->size);
  1264			adreno_show_object(p, &hfi_bo->data, hfi_bo->size,
  1265					&hfi_bo->encoded);
  1266		}
  1267	
  1268		drm_puts(p, "gmu-debug:\n");
  1269		if (gmu_state->debug_bo) {
  1270			struct msm_gpu_state_bo *debug_bo = gmu_state->debug_bo;
  1271	
  1272			drm_printf(p, "    iova: 0x%016llx\n", debug_bo->iova);
  1273			drm_printf(p, "    size: %zu\n", debug_bo->size);
  1274			adreno_show_object(p, &debug_bo->data, debug_bo->size,
  1275					&debug_bo->encoded);
  1276		}
  1277	
  1278		drm_puts(p, "registers-gmu:\n");
  1279		for (i = 0; i < gmu_state->nr_registers; i++) {
  1280			struct a6xx_gpu_state_obj *obj = &gmu_state->registers[i];
  1281			const struct a6xx_registers *regs = obj->handle;
  1282	
  1283			if (!obj->handle)
  1284				continue;
  1285	
  1286			a6xx_show_registers(regs->registers, obj->data, regs->count, p);
  1287		}
  1288	}
  1289	

---
0-DAY CI Kernel Test Service, Intel Corporation
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