DSI Bridge switching

[Jagan Teki]

Hi Andrzej,

On Fri, Oct 8, 2021 at 6:57 PM Andrzej Hajda <andrzej.hajda at gmail.com> wrote:
>
> Hi,
>
> Removed my invalid email (I will update files next week).
>
>
> On 08.10.2021 13:14, Jagan Teki wrote:
> > Hi,
> >
> > I think this seems to be a known use case for industrial these days with i.mx8m.
> >
> > The host DSI would configure with two bridges one for DSI to LVDS
> > (SN65DSI83) and another for DSI to HDMI Out (ADV7535). Technically we
> > can use only one bridge at a time as host DSI support single out port.
> > So we can have two separate device tree files for LVDS and HDMI and
> > load them static.
> >
> > But, one of the use cases is to support both of them in single dts, and
> > - Turn On LVDS (default)
> > - Turn Off LVDS then Turn On HDMI when cable plug-in
>
> Are you sure it will work from hardware PoV? Do you have some demuxer?
> isolation of pins?

Correct. I have noticed after you mentioned this. Design has two 2:1
MIPI Switch PI3WVR626 [1] which take 2 data-lanes and clock from Host
and produce 4 data-lane and 1 clock to connect to ADV7535 and
SN65DSI84 bridges.

The switch has OE, SEL pins to select the desired to MUXed lanes/clock
routing to an appropriate bridge.

>
> >
> > The HDMI event can be detected via some HDMI-INT GPIO on-board design.
> >
> > The possible solution, I'm thinking of adding LVDS on port 1, HDMI on
> > port 2 in the DSI host node, and trying to attach the respective
> > bridge based on HDMI-INT like repeating the bridge attachment cycle
> > based on the HDMI-INT.
>
> I think more appropriate would be to share the same port, but provide
> two endpoints inside this port - we have two hardware sharing the same
> physical port.

Make sense to me. I think we can in-corporate the MIPI Switch on the
pipeline as input data and clock lanes are muxing. not sure how it can
be done.

>
> >
> > Can it be possible to do bridge attachment at runtime? something like
> > a bridge hotplug event? or any other possible solutions?
> >
> > Any suggestions?
>
> Practically it is possible, see exynos_dsi + panels, or exynos_dsi +
> some toshiba bridge - panel and bridge are dynamically 'plugged' and
> 'unplugged' from exynos_drm, but they do not use bridge chain for this
> and some other reasons. (un|re|)plugging should be performed of course
> when pipeline is off (connector disconnected). I am not sure about
> bridges added to bridge chain - you need to inspect all opses to ensure
> it can be done safely.

I will check with this. However i did tried of hot-plug mechanism for
bridge in exiting DSI host sun6i_mipi_dsi.c [2] look like it surely
not possible with bridge-chain as hot-plug require drm pointer where
the same pointer is not available during attach call.

>
> And the main issue: Daniel does not like it :)

[1] https://www.diodes.com/assets/Datasheets/PI3WVR626.pdf
[2] https://elixir.bootlin.com/linux/v5.15-rc4/source/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c#L976

Jagan.