[PATCH v12 05/35] dt-bindings: clock: tegra-car: Document new clock sub-nodes
Dmitry Osipenko
digetx at gmail.com
Fri Oct 15 00:43:49 UTC 2021
15.10.2021 03:16, Stephen Boyd пишет:
> Quoting Dmitry Osipenko (2021-09-20 11:11:15)
>> diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.yaml b/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.yaml
>> index 459d2a525393..f832abb7f11a 100644
>> --- a/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.yaml
>> +++ b/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.yaml
>> @@ -42,6 +42,36 @@ properties:
>> "#reset-cells":
>> const: 1
>>
>> +patternProperties:
>> + "^(sclk)|(pll-[cem])$":
>> + type: object
>> + properties:
>> + compatible:
>> + enum:
>> + - nvidia,tegra20-sclk
>> + - nvidia,tegra30-sclk
>> + - nvidia,tegra30-pllc
>> + - nvidia,tegra30-plle
>> + - nvidia,tegra30-pllm
>> +
>> + operating-points-v2: true
>> +
>> + clocks:
>> + items:
>> + - description: node's clock
>> +
>> + power-domains:
>> + maxItems: 1
>> + description: phandle to the core SoC power domain
>
> Is this done to associate the power domain with a particular clk? And an
> OPP table with a particular clk?
Yes
More information about the dri-devel
mailing list