[PATCH v2 5/6] drm/i915: Don't back up pinned LMEM context images and rings during suspend
Matthew Auld
matthew.auld at intel.com
Wed Sep 8 11:07:15 UTC 2021
On 06/09/2021 17:55, Thomas Hellström wrote:
> Pinned context images are now reset during resume. Don't back them up,
> and assuming that rings can be assumed empty at suspend, don't back them
> up either.
>
> Introduce a new object flag, I915_BO_ALLOC_PM_VOLATILE meaning that an
> object is allowed to lose its content on suspend.
>
> Signed-off-by: Thomas Hellström <thomas.hellstrom at linux.intel.com>
> ---
> .../gpu/drm/i915/gem/i915_gem_object_types.h | 17 ++++++++++-------
> drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c | 3 +++
> drivers/gpu/drm/i915/gt/intel_lrc.c | 3 ++-
> drivers/gpu/drm/i915/gt/intel_ring.c | 3 ++-
> 4 files changed, 17 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> index 734cc8e16481..66123ba46247 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> @@ -288,16 +288,19 @@ struct drm_i915_gem_object {
> I915_SELFTEST_DECLARE(struct list_head st_link);
>
> unsigned long flags;
> -#define I915_BO_ALLOC_CONTIGUOUS BIT(0)
> -#define I915_BO_ALLOC_VOLATILE BIT(1)
> -#define I915_BO_ALLOC_CPU_CLEAR BIT(2)
> -#define I915_BO_ALLOC_USER BIT(3)
> +#define I915_BO_ALLOC_CONTIGUOUS BIT(0)
> +#define I915_BO_ALLOC_VOLATILE BIT(1)
> +#define I915_BO_ALLOC_CPU_CLEAR BIT(2)
> +#define I915_BO_ALLOC_USER BIT(3)
> +/* Object may lose its contents on suspend / resume */
> +#define I915_BO_ALLOC_PM_VOLATILE BIT(4)
PM_SKIP_PINNED? Not sure if that is better.
> #define I915_BO_ALLOC_FLAGS (I915_BO_ALLOC_CONTIGUOUS | \
> I915_BO_ALLOC_VOLATILE | \
> I915_BO_ALLOC_CPU_CLEAR | \
> - I915_BO_ALLOC_USER)
> -#define I915_BO_READONLY BIT(4)
> -#define I915_TILING_QUIRK_BIT 5 /* unknown swizzling; do not release! */
> + I915_BO_ALLOC_USER | \
> + I915_BO_ALLOC_PM_VOLATILE)
> +#define I915_BO_READONLY BIT(5)
> +#define I915_TILING_QUIRK_BIT 6 /* unknown swizzling; do not release! */
>
> /**
> * @mem_flags - Mutable placement-related flags
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c
> index 3884bf45dab8..eaceecfc3f19 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c
> @@ -61,6 +61,9 @@ static int i915_ttm_backup(struct i915_gem_apply_to_region *apply,
> if (!pm_apply->backup_pinned)
> return 0;
>
> + if (obj->flags & I915_BO_ALLOC_PM_VOLATILE)
> + return 0;
> +
> sys_region = i915->mm.regions[INTEL_REGION_SMEM];
> backup = i915_gem_object_create_region(sys_region,
> obj->base.size,
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index 6ba8daea2f56..3ef9eaf8c50e 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -942,7 +942,8 @@ __lrc_alloc_state(struct intel_context *ce, struct intel_engine_cs *engine)
> context_size += PAGE_SIZE;
> }
>
> - obj = i915_gem_object_create_lmem(engine->i915, context_size, 0);
> + obj = i915_gem_object_create_lmem(engine->i915, context_size,
> + I915_BO_ALLOC_PM_VOLATILE);
> if (IS_ERR(obj))
> obj = i915_gem_object_create_shmem(engine->i915, context_size);
> if (IS_ERR(obj))
> diff --git a/drivers/gpu/drm/i915/gt/intel_ring.c b/drivers/gpu/drm/i915/gt/intel_ring.c
> index 7c4d5158e03b..2fdd52b62092 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ring.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ring.c
> @@ -112,7 +112,8 @@ static struct i915_vma *create_ring_vma(struct i915_ggtt *ggtt, int size)
> struct drm_i915_gem_object *obj;
> struct i915_vma *vma;
>
> - obj = i915_gem_object_create_lmem(i915, size, I915_BO_ALLOC_VOLATILE);
> + obj = i915_gem_object_create_lmem(i915, size, I915_BO_ALLOC_VOLATILE |
> + I915_BO_ALLOC_PM_VOLATILE);
> if (IS_ERR(obj) && i915_ggtt_has_aperture(ggtt))
> obj = i915_gem_object_create_stolen(i915, size);
> if (IS_ERR(obj))
>
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