[PATCH 1/2] drm/bridge: parade-ps8640: Use regmap APIs

[Stephen Boyd]

Quoting Philip Chen (2021-09-09 11:29:19)
> Hi,
>
> On Wed, Sep 8, 2021 at 2:54 PM Stephen Boyd <swboyd at chromium.org> wrote:
> >
> > Quoting Philip Chen (2021-09-08 11:18:05)
> > > diff --git a/drivers/gpu/drm/bridge/parade-ps8640.c b/drivers/gpu/drm/bridge/parade-ps8640.c
> > > index 685e9c38b2db..a16725dbf912 100644
> > > --- a/drivers/gpu/drm/bridge/parade-ps8640.c
> > > +++ b/drivers/gpu/drm/bridge/parade-ps8640.c
> > > @@ -64,12 +65,29 @@ struct ps8640 {
> > >         struct drm_bridge *panel_bridge;
> > >         struct mipi_dsi_device *dsi;
> > >         struct i2c_client *page[MAX_DEVS];
> > > +       struct regmap   *regmap[MAX_DEVS];
> > >         struct regulator_bulk_data supplies[2];
> > >         struct gpio_desc *gpio_reset;
> > >         struct gpio_desc *gpio_powerdown;
> > >         bool powered;
> > >  };
> > >
> > > +static const struct regmap_range ps8640_volatile_ranges[] = {
> > > +       { .range_min = 0, .range_max = 0xff },
> >
> > Is the plan to fill this out later or is 0xff the max register? If it's
> > the latter then I think adding the max register to regmap_config is
> > simpler.
> It's the former.
> The real accessible register range is different per page, E.g.:
> - For page0, the register range is 0x00 - 0xbf.
> - For page1, the register range is 0x00 - 0xff.
> - For page2, the register range is 0x80 - 0xff.

Oh does this have register pages? regmap has support for pages where you
write some indirection register and then access the same i2c address for
the next page. This looks different though and has a different i2c
address for each page?

> Even if we don't specify the accurate per-page register range later,
> the default register range here (0x00 - 0xff) can cover the available
> registers in each page.

That could be done with max address in the config though, right?
volatile ranges is to indicate which registers are volatile and can't be
cached. I sort of doubt the entire rage is volatile.