[PATCH v2] drm/v3d: fix wait for TMU write combiner flush

[Melissa Wen]

On 09/15, Iago Toral Quiroga wrote:
> The hardware sets the TMUWCF bit back to 0 when the TMU write
> combiner flush completes so we should be checking for that instead
> of the L2TFLS bit.
> 
> v2 (Melissa Wen):
>   - Add Signed-off-by and Fixes tags.
>   - Change the error message for the timeout to be more clear.
> 
> Fixes spurious Vulkan CTS failures in:
> dEQP-VK.binding_model.descriptorset_random.*
> 
> Fixes: d223f98f02099 ("drm/v3d: Add support for compute shader dispatch")
> Signed-off-by: Iago Toral Quiroga <itoral at igalia.com>
> Reviewed-by: Melissa Wen <mwen at igalia.com>

Applied to drm-misc-next.

Thanks,

Melissa

> ---
>  drivers/gpu/drm/v3d/v3d_gem.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/v3d/v3d_gem.c b/drivers/gpu/drm/v3d/v3d_gem.c
> index a3529809d547..1953706bdaeb 100644
> --- a/drivers/gpu/drm/v3d/v3d_gem.c
> +++ b/drivers/gpu/drm/v3d/v3d_gem.c
> @@ -197,8 +197,8 @@ v3d_clean_caches(struct v3d_dev *v3d)
>  
>  	V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL, V3D_L2TCACTL_TMUWCF);
>  	if (wait_for(!(V3D_CORE_READ(core, V3D_CTL_L2TCACTL) &
> -		       V3D_L2TCACTL_L2TFLS), 100)) {
> -		DRM_ERROR("Timeout waiting for L1T write combiner flush\n");
> +		       V3D_L2TCACTL_TMUWCF), 100)) {
> +		DRM_ERROR("Timeout waiting for TMU write combiner flush\n");
>  	}
>  
>  	mutex_lock(&v3d->cache_clean_lock);
> -- 
> 2.25.1
>