[PATCH v2 1/7] dt-bindings: display: renesas,du: Document r9a07g044l bindings

Biju Das biju.das.jz at bp.renesas.com
Wed Apr 20 15:58:51 UTC 2022


Hi Laurent,

Thanks for the feedback.

> Subject: Re: [PATCH v2 1/7] dt-bindings: display: renesas,du: Document
> r9a07g044l bindings
> 
> Hi Biju,
> 
> Thank you for the patch.
> 
> On Wed, Mar 16, 2022 at 01:10:54PM +0000, Biju Das wrote:
> > Extend the Renesas DU display bindings to support the r9a07g044l DU
> > module found on RZ/G2L LCDC.
> 
> Stupid question, but as this DU and the R-Car DU are completely different
> pieces of hardware, wouldn't a separate bindings file make sense ?

OK, will create separate bindings for RZ/G2L DU

Cheers,
Biju

> 
> The DT description in this patch looks good to me.
> 
> > Signed-off-by: Biju Das <biju.das.jz at bp.renesas.com>
> > ---
> > v1->v2:
> >  * Updated commit description.
> >  * Removed LCDC references
> >  * Changed clock name from du.0->aclk
> >  * Changed reset name from du.0->du
> > RFC->v1:
> >  * Changed  minItems->maxItems for renesas,vsps.
> > RFC:
> >
> > ---
> >  .../bindings/display/renesas,du.yaml          | 54 +++++++++++++++++++
> >  1 file changed, 54 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/display/renesas,du.yaml
> > b/Documentation/devicetree/bindings/display/renesas,du.yaml
> > index 13efea574584..f560608bf4e8 100644
> > --- a/Documentation/devicetree/bindings/display/renesas,du.yaml
> > +++ b/Documentation/devicetree/bindings/display/renesas,du.yaml
> > @@ -40,6 +40,7 @@ properties:
> >        - renesas,du-r8a77990 # for R-Car E3 compatible DU
> >        - renesas,du-r8a77995 # for R-Car D3 compatible DU
> >        - renesas,du-r8a779a0 # for R-Car V3U compatible DU
> > +      - renesas,du-r9a07g044l # for RZ/G2L compatible DU
> >
> >    reg:
> >      maxItems: 1
> > @@ -824,6 +825,59 @@ allOf:
> >          - reset-names
> >          - renesas,vsps
> >
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          contains:
> > +            enum:
> > +              - renesas,du-r9a07g044l
> > +    then:
> > +      properties:
> > +        clocks:
> > +          items:
> > +            - description: Main clock
> > +            - description: Register access clock
> > +            - description: Video clock
> > +
> > +        clock-names:
> > +          items:
> > +            - const: aclk
> > +            - const: pclk
> > +            - const: vclk
> > +
> > +        interrupts:
> > +          maxItems: 1
> > +
> > +        resets:
> > +          maxItems: 1
> > +
> > +        reset-names:
> > +          items:
> > +            - const: du
> > +
> > +        ports:
> > +          properties:
> > +            port at 0:
> > +              description: DPAD 0
> > +            port at 1:
> > +              description: DSI 0
> > +            port at 2: false
> > +            port at 3: false
> > +
> > +          required:
> > +            - port at 0
> > +            - port at 1
> > +
> > +        renesas,vsps:
> > +          maxItems: 1
> > +
> > +      required:
> > +        - clock-names
> > +        - interrupts
> > +        - resets
> > +        - reset-names
> > +        - renesas,vsps
> > +
> >  additionalProperties: false
> >
> >  examples:
> 
> --
> Regards,
> 
> Laurent Pinchart


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