[PATCH 0/2] i915: Turn on compute engine support

[Matt Roper]

Now that the necessary GuC-based hardware workarounds have landed, we're
finally ready to actually enable compute engines for use by userspace.
All of the "under-the-hood" heavy lifting already landed a while back in
other series so all that remains now is to add I915_ENGINE_CLASS_COMPUTE
to the uapi enum and add the CCS engines to the engine lists for the
Xe_HP SDV and DG2.

Userspace (both Mesa and compute drivers) are linked in the ABI patch.
Existing IGT tests (e.g., i915_hangman) provide test coverage for
general engine behavior since compute engines should follow the same
general rules as other engines.  We've also recently added some
additional subtests like igt at gem_reset_stats@shared-reset-domain to
cover the user-visible impacts of the compute engines sharing the same
hardware reset domain as the render engine.

Cc: Lucas De Marchi <lucas.demarchi at intel.com>

Daniele Ceraolo Spurio (1):
  drm/i915: Xe_HP SDV and DG2 have up to 4 CCS engines

Matt Roper (1):
  drm/i915/xehp: Add compute engine ABI

 drivers/gpu/drm/i915/gt/intel_engine_user.c |  2 +-
 drivers/gpu/drm/i915/gt/intel_gt.c          |  1 +
 drivers/gpu/drm/i915/i915_drm_client.c      |  1 +
 drivers/gpu/drm/i915/i915_drm_client.h      |  2 +-
 drivers/gpu/drm/i915/i915_pci.c             |  6 +-
 include/uapi/drm/i915_drm.h                 | 62 +++++++++++++++++++--
 6 files changed, 64 insertions(+), 10 deletions(-)

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2.35.1