[PATCH] video: fbdev: radeon: Clean up some inconsistent indenting
Helge Deller
deller at gmx.de
Mon Aug 22 20:07:32 UTC 2022
On 8/19/22 13:06, Jiapeng Chong wrote:
> No functional modification involved.
>
> drivers/video/fbdev/aty/radeon_base.c:2107 radeon_identify_vram() warn: inconsistent indenting.
>
> Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=1932
> Reported-by: Abaci Robot <abaci at linux.alibaba.com>
> Signed-off-by: Jiapeng Chong <jiapeng.chong at linux.alibaba.com>
applied.
Thanks!
Helge
> ---
> drivers/video/fbdev/aty/radeon_base.c | 46 +++++++++++++--------------
> 1 file changed, 23 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/video/fbdev/aty/radeon_base.c b/drivers/video/fbdev/aty/radeon_base.c
> index 0a8199985d52..1e6ac7ef3e73 100644
> --- a/drivers/video/fbdev/aty/radeon_base.c
> +++ b/drivers/video/fbdev/aty/radeon_base.c
> @@ -2095,34 +2095,34 @@ static void radeon_identify_vram(struct radeonfb_info *rinfo)
> u32 tmp;
>
> /* framebuffer size */
> - if ((rinfo->family == CHIP_FAMILY_RS100) ||
> + if ((rinfo->family == CHIP_FAMILY_RS100) ||
> (rinfo->family == CHIP_FAMILY_RS200) ||
> (rinfo->family == CHIP_FAMILY_RS300) ||
> (rinfo->family == CHIP_FAMILY_RC410) ||
> (rinfo->family == CHIP_FAMILY_RS400) ||
> (rinfo->family == CHIP_FAMILY_RS480) ) {
> - u32 tom = INREG(NB_TOM);
> - tmp = ((((tom >> 16) - (tom & 0xffff) + 1) << 6) * 1024);
> -
> - radeon_fifo_wait(6);
> - OUTREG(MC_FB_LOCATION, tom);
> - OUTREG(DISPLAY_BASE_ADDR, (tom & 0xffff) << 16);
> - OUTREG(CRTC2_DISPLAY_BASE_ADDR, (tom & 0xffff) << 16);
> - OUTREG(OV0_BASE_ADDR, (tom & 0xffff) << 16);
> -
> - /* This is supposed to fix the crtc2 noise problem. */
> - OUTREG(GRPH2_BUFFER_CNTL, INREG(GRPH2_BUFFER_CNTL) & ~0x7f0000);
> -
> - if ((rinfo->family == CHIP_FAMILY_RS100) ||
> - (rinfo->family == CHIP_FAMILY_RS200)) {
> - /* This is to workaround the asic bug for RMX, some versions
> - of BIOS doesn't have this register initialized correctly.
> - */
> - OUTREGP(CRTC_MORE_CNTL, CRTC_H_CUTOFF_ACTIVE_EN,
> - ~CRTC_H_CUTOFF_ACTIVE_EN);
> - }
> - } else {
> - tmp = INREG(CNFG_MEMSIZE);
> + u32 tom = INREG(NB_TOM);
> +
> + tmp = ((((tom >> 16) - (tom & 0xffff) + 1) << 6) * 1024);
> + radeon_fifo_wait(6);
> + OUTREG(MC_FB_LOCATION, tom);
> + OUTREG(DISPLAY_BASE_ADDR, (tom & 0xffff) << 16);
> + OUTREG(CRTC2_DISPLAY_BASE_ADDR, (tom & 0xffff) << 16);
> + OUTREG(OV0_BASE_ADDR, (tom & 0xffff) << 16);
> +
> + /* This is supposed to fix the crtc2 noise problem. */
> + OUTREG(GRPH2_BUFFER_CNTL, INREG(GRPH2_BUFFER_CNTL) & ~0x7f0000);
> +
> + if ((rinfo->family == CHIP_FAMILY_RS100) ||
> + (rinfo->family == CHIP_FAMILY_RS200)) {
> + /* This is to workaround the asic bug for RMX, some versions
> + * of BIOS doesn't have this register initialized correctly.
> + */
> + OUTREGP(CRTC_MORE_CNTL, CRTC_H_CUTOFF_ACTIVE_EN,
> + ~CRTC_H_CUTOFF_ACTIVE_EN);
> + }
> + } else {
> + tmp = INREG(CNFG_MEMSIZE);
> }
>
> /* mem size is bits [28:0], mask off the rest */
More information about the dri-devel
mailing list