[PATCH v2] drm/msm/dp: correct 1.62G link rate at dp_catalog_ctrl_config_msa()

[Stephen Boyd]

Quoting Kuogee Hsieh (2022-08-24 10:22:31)
> At current implementation there is an extra 0 at 1.62G link rate which cause
> no correct pixel_div selected for 1.62G link rate to calculate mvid and nvid.
> This patch delete the extra 0 to have mvid and nvid be calculated correctly.
>
> Changes in v2:
> -- fix Fixes tag's text
>
> Fixes: 937f941ca06f  ("drm/msm/dp: Use qmp phy for DP PLL and PHY")
> Signed-off-by: Kuogee Hsieh <quic_khsieh at quicinc.com>
>
> Reviewed-by: Stephen Boyd <swboyd at chromium.org>
> eviewed-by: Abhinav Kumar <quic_abhinavk at quicinc.com>

Missing an R.

>
> diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.c b/drivers/gpu/drm/msm/dp/dp_catalog.c
> index 7257515..676279d 100644
> --- a/drivers/gpu/drm/msm/dp/dp_catalog.c
> +++ b/drivers/gpu/drm/msm/dp/dp_catalog.c
> @@ -431,7 +431,7 @@ void dp_catalog_ctrl_config_msa(struct dp_catalog *dp_catalog,
>
>         if (rate == link_rate_hbr3)
>                 pixel_div = 6;
> -       else if (rate == 1620000 || rate == 270000)
> +       else if (rate == 162000 || rate == 270000)

BTW

  $ git grep 162000 -- drivers/gpu/drm/msm/dp/
  drivers/gpu/drm/msm/dp/dp_catalog.c:    else if (rate == 1620000 ||
rate == 270000)
  drivers/gpu/drm/msm/dp/dp_ctrl.c:
ctrl->link->link_params.rate = 162000;
  drivers/gpu/drm/msm/dp/dp_ctrl.c:       case 162000:

We really should have a #define for these things. Can you send a
different followup patch that makes something like HBR3_KHZ, HBR2_KHZ,
etc. and then replaces these bare numbers throughout the driver? That
would prevent this from happening again. This one liner can and should
be backported to stable trees.