[PATCH 1/2] dt-bindings: drm/bridge: ti-sn65dsi83: Add enable delay property

[Krzysztof Kozlowski]

On 12/12/2022 10:09, Frieder Schrempf wrote:
>>>> This does seem like a hardware bug right there, can you double-check
>>>> this with the hardware engineer ?
>>>
>>> Yep, checked with hardware engineer. An 470nF is attached, together
>>> with an
>>> open drain output and only the internal pull-up. So yes ~113ms rising
>>> time
>>> until 0.7 x VCC.
>>
>> I don't suppose you can have that capacitor reduced or better yet, some
>> external pull up added, can you ?
> 
> Actually our HW engineers have implemented a similar RC circuit to
> provide a hardware delay for the EN signal. I think this is due to a
> design note in the datasheet (see chapter 7.4.1) and therefore it's
> probably widely spread.

If I read section 7.4.1 correctly, it would be enough to just add delay
Ten=1ms instead of the capacitor, right? And that would be
device-specific. But if one chooses the capacitor solution, it becomes
now board specific.

Best regards,
Krzysztof