[PATCH v2 3/4] dt-bindings: display: imx: add binding for i.MX8MP HDMI PVI

Liu Ying victor.liu at nxp.com
Sat Dec 17 08:57:42 UTC 2022


On Fri, 2022-12-16 at 22:07 +0100, Lucas Stach wrote:
> Add binding for the i.MX8MP HDMI parallel video interface block.
> 
> Signed-off-by: Lucas Stach <l.stach at pengutronix.de>
> ---
>  .../display/imx/fsl,imx8mp-hdmi-pvi.yaml      | 79
> +++++++++++++++++++
>  1 file changed, 79 insertions(+)
>  create mode 100644
> Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-
> pvi.yaml
> 
> diff --git
> a/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-
> pvi.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-
> hdmi-pvi.yaml
> new file mode 100644
> index 000000000000..aa369721ac99
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-
> pvi.yaml
> @@ -0,0 +1,79 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: 
> http://devicetree.org/schemas/display/imx/fsl,imx8mp-hdmi-pvi.yaml#

Similar to my comment on patch 1/4, it's better to put the binding
documentation in the display/bridge umbrella as the corresponding
driver is a DRM bridge driver, not a DRM encoder driver.

> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale i.MX8MP HDMI Parallel Video Interface
> +
> +maintainers:
> +  - Lucas Stach <l.stach at pengutronix.de>
> +
> +description: |
> +  The HDMI parallel video interface is a timing and sync generator
> block in the
> +  i.MX8MP SoC, that sits between the video source and the HDMI TX
> controller.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - fsl,imx8mp-hdmi-pvi

Consider to use const instead?  It can be changed to enum when
necessary.

> +
> +  reg:
> +    maxItems: 1
> +
> +  power-domains:
> +    maxItems: 1
> +
> +  ports:
> +    $ref: /schemas/graph.yaml#/properties/ports
> +
> +    properties:
> +      port at 0:
> +        $ref: /schemas/graph.yaml#/properties/port
> +        description: Input from the LCDIF controller.
> +
> +      port at 1:
> +        $ref: /schemas/graph.yaml#/properties/port
> +        description: Output to the HDMI TX controller

Nitpick: missing full stop '.'.

> +
> +    required:
> +      - port at 0
> +      - port at 1

i.MX8mp RM mentions a 'htx_p_clock(pixel clock)' in HTX_PVI Block
Diagram as an input clock to the HDMI PVI.  It looks like the same
pixel clock generated by LCDIF, not sure.  Maybe, list it as a required
'clocks' property?

Moreover, according to i.MX8mp RM, it seems that the HDMI PVI may
generate interrupts which map to u_irq_steer.irq_in[12] in HDMI TX
subsystem.  So, list it as an 'interrupts' property?

> +
> +required:
> +  - compatible
> +  - reg
> +  - power-domains
> +  - ports
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/imx8mp-clock.h>

This is not needed if the example node doesn't contain 'clocks'
property.

Regards,
Liu Ying

> +    #include <dt-bindings/power/imx8mp-power.h>
> +
> +    display-bridge at 32fc4000 {
> +        compatible = "fsl,imx8mp-hdmi-pvi";
> +        reg = <0x32fc4000 0x40>;
> +        power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_PVI>;
> +
> +        ports {
> +            #address-cells = <1>;
> +            #size-cells = <0>;
> +
> +            port at 0 {
> +                reg = <0>;
> +                pvi_from_lcdif3: endpoint {
> +                    remote-endpoint = <&lcdif3_to_pvi>;
> +                };
> +            };
> +
> +            port at 1 {
> +                reg = <1>;
> +                pvi_to_hdmi_tx: endpoint {
> +                    remote-endpoint = <&hdmi_tx_from_pvi>;
> +                };
> +            };
> +        };
> +    };



More information about the dri-devel mailing list