[PATCH v7 4/7] MIPS: Loongson: introduce dts for lemote A1901 3a4000 motherboard
Sui Jingfeng
15330273260 at 189.cn
Sun Feb 13 14:16:46 UTC 2022
From: suijingfeng <suijingfeng at loongson.cn>
This board has only one VGA output which is connected to DVO1 of
the display controller. More details about this motherboard can be
read from [1].
+------+ +-----------------------------------+
| DDR4 | | +-------------------+ |
+------+ | | PCIe Root complex | LS7A1000 |
|| MC0 | +--++---------++----+ |
+----------+ HT 3.0 | || || |
| LS3A4000 |<-------->| +---++---+ +--++--+ +---------+ +------+
| CPU |<-------->| | GC1000 | | LSDC |<-->| DDR3 MC |<->| VRAM |
+----------+ | +--------+ +-+--+-+ +---------+ +------+
|| MC1 +---------------|--|----------------+
+------+ | |
| DDR4 | DVO0 is not get used | | DVO1 +-------+
+------+ <--------------------+ +-------->|ADV7125|---> VGA
+-------+
Note, LEMOTE corporation is one of the downstream board manufacturer of
LOONGSON. The model property can be used to tell the kernel board specific
information.
[1] https://wiki.godson.ac.cn/device:lemote_a1901
Signed-off-by: suijingfeng <suijingfeng at loongson.cn>
Signed-off-by: Sui Jingfeng <15330273260 at 189.cn>
---
arch/mips/boot/dts/loongson/lemote_a1901.dts | 59 ++++++++++++++++++++
1 file changed, 59 insertions(+)
create mode 100644 arch/mips/boot/dts/loongson/lemote_a1901.dts
diff --git a/arch/mips/boot/dts/loongson/lemote_a1901.dts b/arch/mips/boot/dts/loongson/lemote_a1901.dts
new file mode 100644
index 000000000000..ca57c27ad845
--- /dev/null
+++ b/arch/mips/boot/dts/loongson/lemote_a1901.dts
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/dts-v1/;
+
+#include "loongson64g-package.dtsi"
+#include "ls7a-pch.dtsi"
+
+/ {
+ model = "LX-6901";
+};
+
+&package0 {
+ htvec: interrupt-controller at efdfb000080 {
+ compatible = "loongson,htvec-1.0";
+ reg = <0xefd 0xfb000080 0x40>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&liointc>;
+ interrupts = <24 IRQ_TYPE_LEVEL_HIGH>,
+ <25 IRQ_TYPE_LEVEL_HIGH>,
+ <26 IRQ_TYPE_LEVEL_HIGH>,
+ <27 IRQ_TYPE_LEVEL_HIGH>,
+ <28 IRQ_TYPE_LEVEL_HIGH>,
+ <29 IRQ_TYPE_LEVEL_HIGH>,
+ <30 IRQ_TYPE_LEVEL_HIGH>,
+ <31 IRQ_TYPE_LEVEL_HIGH>;
+ };
+};
+
+&pch {
+ msi: msi-controller at 2ff00000 {
+ compatible = "loongson,pch-msi-1.0";
+ reg = <0 0x2ff00000 0 0x8>;
+ interrupt-controller;
+ msi-controller;
+ loongson,msi-base-vec = <64>;
+ loongson,msi-num-vecs = <192>;
+ interrupt-parent = <&htvec>;
+ };
+};
+
+&lsdc {
+ output-ports = <&dvo0 &dvo1>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dvo0: dvo at 0 {
+ reg = <0>;
+ status = "disabled";
+ };
+
+ dvo1: dvo at 1 {
+ reg = <1>;
+ connector = "vga-connector";
+ status = "okay";
+ };
+};
--
2.25.1
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