[PATCH v4 1/2] drm/msm/dpu: simplify clocks handling

[Dmitry Baryshkov]

On 16/02/2022 05:31, Stephen Boyd wrote:
> Quoting Dmitry Baryshkov (2022-01-31 13:05:12)
>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
>> index 60fe06018581..4d184122d63e 100644
>> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
>> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
>> @@ -405,10 +394,11 @@ int dpu_core_perf_crtc_update(struct drm_crtc *crtc,
>>
>>                  trace_dpu_core_perf_update_clk(kms->dev, stop_req, clk_rate);
>>
>> -               ret = _dpu_core_perf_set_core_clk_rate(kms, clk_rate);
>> +               if (clk_rate > kms->perf.max_core_clk_rate)
>> +                       clk_rate = kms->perf.max_core_clk_rate;
> 
> Using
> 
> 	clk_rate = min(clk_rate, kms->perf.max_core_clk_rate)
> 
> would be type safer. And min_t() would be explicit if the types don't
> match, but we should try to make them be compatible.

Ack

> 
>> +               ret = dev_pm_opp_set_rate(&kms->pdev->dev, clk_rate);
>>                  if (ret) {
>> -                       DPU_ERROR("failed to set %s clock rate %llu\n",
>> -                                       kms->perf.core_clk->clk_name, clk_rate);
>> +                       DPU_ERROR("failed to set core clock rate %llu\n", clk_rate);
>>                          return ret;
>>                  }
>>
>> @@ -529,13 +519,13 @@ void dpu_core_perf_destroy(struct dpu_core_perf *perf)
>>   int dpu_core_perf_init(struct dpu_core_perf *perf,
>>                  struct drm_device *dev,
>>                  struct dpu_mdss_cfg *catalog,
>> -               struct dss_clk *core_clk)
>> +               struct clk *core_clk)
>>   {
>>          perf->dev = dev;
>>          perf->catalog = catalog;
>>          perf->core_clk = core_clk;
>>
>> -       perf->max_core_clk_rate = core_clk->max_rate;
>> +       perf->max_core_clk_rate = clk_get_rate(core_clk);
>>          if (!perf->max_core_clk_rate) {
>>                  DPU_DEBUG("optional max core clk rate, use default\n");
>>                  perf->max_core_clk_rate = DPU_PERF_DEFAULT_MAX_CORE_CLK_RATE;
>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
>> index 2d385b4b7f5e..5f562413bb63 100644
>> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
>> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
>> @@ -21,7 +21,6 @@
>>   #include "dpu_hw_lm.h"
>>   #include "dpu_hw_interrupts.h"
>>   #include "dpu_hw_top.h"
>> -#include "dpu_io_util.h"
>>   #include "dpu_rm.h"
>>   #include "dpu_core_perf.h"
>>
>> @@ -113,7 +112,8 @@ struct dpu_kms {
>>          struct platform_device *pdev;
>>          bool rpm_enabled;
>>
>> -       struct dss_module_power mp;
>> +       struct clk_bulk_data *clocks;
>> +       int num_clocks;
> 
> size_t?
> 
>>
>>          /* reference count bandwidth requests, so we know when we can
>>           * release bandwidth.  Each atomic update increments, and frame-
>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
>> index 131c1f1a869c..8c038416e119 100644
>> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
>> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
>> @@ -29,7 +29,8 @@ struct dpu_irq_controller {
>>   struct dpu_mdss {
>>          struct msm_mdss base;
>>          void __iomem *mmio;
>> -       struct dss_module_power mp;
>> +       struct clk_bulk_data *clocks;
>> +       int num_clocks;
> 
> size_t?
> 
>>          struct dpu_irq_controller irq_controller;
>>   };
>>


-- 
With best wishes
Dmitry