[1/3] drm/mediatek: Adjust the timing of mipi signal from LP00 to LP11

[xinlei.lee]

On Mon, 2022-02-14 at 10:54 +0800, CK Hu wrote:
> Hi, Xinlei:
> 
> On Fri, 2022-02-11 at 22:30 +0800, xinlei.lee at mediatek.com wrote:
> > From: Jitao Shi <jitao.shi at mediatek.com>
> > 
> > In order to cooperate with patch 3/3 modification,it is necessary
> > to
> > adjust 
> > the position where mipi pulls up the signal.
> 
> After the patch is applied, the series index (3/3) is disappear, so
> do
> not reference series index in commit description. I think this series
> is to adjust the calling sequence, so you could describe as below:
> 
> Old sequence:
> 1. aaa
> 2. bbb
> 3. ccc
> 4. ddd
> 
> New sequence:
> 1. bbb
> 2. aaa
> 3. ddd
> 4. ccc
> 
> and this patch is to adjust 'aaa' and 'bbb'.
> 
> Regards,
> CK
> 
> > 
> > Signed-off-by: Jitao Shi <jitao.shi at mediatek.com>
> > Signed-off-by: Xinlei Lee <xinlei.lee at mediatek.com>
> > ---
> >  drivers/gpu/drm/mediatek/mtk_dsi.c | 6 +++---
> >  1 file changed, 3 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
> > b/drivers/gpu/drm/mediatek/mtk_dsi.c
> > index 5d90d2eb..6d7b66d 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
> > @@ -649,14 +649,14 @@ static int mtk_dsi_poweron(struct mtk_dsi
> > *dsi)
> >  	mtk_dsi_reset_engine(dsi);
> >  	mtk_dsi_phy_timconfig(dsi);
> >  
> > -	mtk_dsi_rxtx_control(dsi);
> > -	usleep_range(30, 100);
> > -	mtk_dsi_reset_dphy(dsi);
> >  	mtk_dsi_ps_control_vact(dsi);
> >  	mtk_dsi_set_vm_cmd(dsi);
> >  	mtk_dsi_config_vdo_timing(dsi);
> >  	mtk_dsi_set_interrupt_enable(dsi);
> >  
> > +	mtk_dsi_rxtx_control(dsi);
> > +	usleep_range(30, 100);
> > +	mtk_dsi_reset_dphy(dsi);
> >  	mtk_dsi_clk_ulp_mode_leave(dsi);
> >  	mtk_dsi_lane0_ulp_mode_leave(dsi);
> >  	mtk_dsi_clk_hs_mode(dsi, 0);
> 
> 

Hi CK:

Thanks for your review!
I will be sending out v2 in the near future based on your suggestion.

Best Regards!
xinlei