[PATCH v8 1/4] drm/msm/dpu: adjust display_v_end for eDP and DP

[Stephen Boyd]

Quoting Kuogee Hsieh (2022-02-17 13:36:25)
> The “DP timing” requires the active region to be defined in the
> bottom-right corner of the frame dimensions which is different
> with DSI. Therefore both display_h_end and display_v_end need
> to be adjusted accordingly. However current implementation has
> only display_h_end adjusted.
>
> Signed-off-by: Kuogee Hsieh <quic_khsieh at quicinc.com>
> ---

Is this not a problem for me because this is set already to something
correct in the hardware?

Reviewed-by: Stephen Boyd <swboyd at chromium.org>