[PATCH v10 1/4] MIPS: Loongson64: dts: update the display controller device node

Sui Jingfeng 15330273260 at 189.cn
Sun Feb 20 14:55:51 UTC 2022


From: suijingfeng <suijingfeng at loongson.cn>

The display controller is a pci device, its PCI vendor id is 0x0014
its PCI device id is 0x7a06.

1) In order to let the driver to know which chip the DC is contained
   in, the compatible string of the display controller is updated
   according to the chip's name.

2) Add display controller device node for ls2k1000 SoC

Reported-by: Krzysztof Kozlowski <krzk at kernel.org>
Signed-off-by: suijingfeng <suijingfeng at loongson.cn>
Signed-off-by: Sui Jingfeng <15330273260 at 189.cn>
---
 arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi | 8 ++++++++
 arch/mips/boot/dts/loongson/ls7a-pch.dtsi          | 7 ++-----
 2 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi b/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi
index 768cf2abcea3..af9cda540f9e 100644
--- a/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi
+++ b/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi
@@ -209,6 +209,14 @@ gpu at 5,0 {
 				interrupt-parent = <&liointc0>;
 			};
 
+			lsdc: display-controller at 6,0 {
+				compatible = "loongson,ls2k1000-dc";
+
+				reg = <0x3000 0x0 0x0 0x0 0x0>;
+				interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
+				interrupt-parent = <&liointc0>;
+			};
+
 			pci_bridge at 9,0 {
 				compatible = "pci0014,7a19.0",
 						   "pci0014,7a19",
diff --git a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
index 2f45fce2cdc4..ec35ea9b2fe8 100644
--- a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
+++ b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
@@ -160,11 +160,8 @@ gpu at 6,0 {
 				interrupt-parent = <&pic>;
 			};
 
-			dc at 6,1 {
-				compatible = "pci0014,7a06.0",
-						   "pci0014,7a06",
-						   "pciclass030000",
-						   "pciclass0300";
+			lsdc: display-controller at 6,1 {
+				compatible = "loongson,ls7a1000-dc";
 
 				reg = <0x3100 0x0 0x0 0x0 0x0>;
 				interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
-- 
2.25.1



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