[RFC PATCH 2/5] Documentation/amdgpu/display: add DC color caps info
Melissa Wen
mwen at igalia.com
Tue Jul 12 15:05:43 UTC 2022
O 06/28, Harry Wentland wrote:
>
>
> On 6/19/22 18:31, Melissa Wen wrote:
> > Add details about color correction capabilities and explain a bit about
> > differences between DC hw generations and also how they are mapped
> > between DRM and DC interface. Two schemas for DCN 2.0 and 3.0
> > (rasterized from the original png) is included to illustrate it. They
> > were obtained from a discussion[1] in the amd-gfx mailing list.
> >
> > [1] https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.kernel.org%2Famd-gfx%2F20220422142811.dm6vtk6v64jcwydk%40mail.igalia.com%2F&data=05%7C01%7Charry.wentland%40amd.com%7C11fb474339ba49ad492a08da52439534%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637912748027800719%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C2000%7C%7C%7C&sdata=1eUQmjydQoDifmsZHfS%2F9PPEJeaZvQ4xGgjblTL9dZE%3D&reserved=0
> >
> > Signed-off-by: Melissa Wen <mwen at igalia.com>
> > ---
> > .../amdgpu/display/dcn2_cm_drm_current.svg | 1370 +++++++++++++++
> > .../amdgpu/display/dcn3_cm_drm_current.svg | 1528 +++++++++++++++++
> > .../gpu/amdgpu/display/display-manager.rst | 35 +
> > drivers/gpu/drm/amd/display/dc/dc.h | 53 +-
> > 4 files changed, 2985 insertions(+), 1 deletion(-)
> > create mode 100644 Documentation/gpu/amdgpu/display/dcn2_cm_drm_current.svg
> > create mode 100644 Documentation/gpu/amdgpu/display/dcn3_cm_drm_current.svg
> >
> > diff --git a/Documentation/gpu/amdgpu/display/dcn2_cm_drm_current.svg b/Documentation/gpu/amdgpu/display/dcn2_cm_drm_current.svg
> > new file mode 100644
> > index 000000000000..0156f56d4482
> > --- /dev/null
> > +++ b/Documentation/gpu/amdgpu/display/dcn2_cm_drm_current.svg
> > @@ -0,0 +1,1370 @@
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> > diff --git a/Documentation/gpu/amdgpu/display/display-manager.rst b/Documentation/gpu/amdgpu/display/display-manager.rst
> > index b1b0f11aed83..8960a5f1fa66 100644
> > --- a/Documentation/gpu/amdgpu/display/display-manager.rst
> > +++ b/Documentation/gpu/amdgpu/display/display-manager.rst
> > @@ -49,3 +49,38 @@ Color Management Properties
> >
> > .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
> > :internal:
> > +
> > +
> > +DC Color Capabilities between DCN generations
> > +---------------------------------------------
> > +
> > +DRM/KMS framework defines three CRTC color correction properties: degamma,
> > +color transformation matrix (ctm) and gamma, and two properties for degamma and
> > +gamma lut sizes. AMD DC programs some of the color correction features
> > +pre-blending but DRM/KMS has not per-plane color correction properties.
> > +
> > +What's possible to do before and after blending has changed quite a bit between
> > +DCN generations as it depends on hardware color capabilities. DPP and MPC color
> > +correction caps are described below.
> > +
> > +.. kernel-doc:: drivers/gpu/drm/amd/display/dc/dc.h
> > + :doc: color-management-caps
> > +
> > +.. kernel-doc:: drivers/gpu/drm/amd/display/dc/dc.h
> > + :internal:
> > +
> > +In general, the DRM three properties are programed to DC, as follows: CRTC
> > +gamma after blending, and CRTC degamma pre-blending. Although CTM is programmed
> > +after blending, it is mapped to DPP hw blocks (pre-blending). Other color caps
> > +available in the hw is not currently exposed by DRM interface and are by
> > +passed. To illustrate DCN generation capabilities and differences between
> > +them, you can compare the color management schemas for DCN 2.0 and DCN 3.0
> > +families below.
> > +
> > +**DCN 2.0 family color caps and mapping**
> > +
> > +.. kernel-figure:: dcn2_cm_drm_current.svg
> > +
> > +**DCN 3.0 family color caps and mapping**
> > +
> > +.. kernel-figure:: dcn3_cm_drm_current.svg
> > diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
> > index 76db013aac6e..5729de58a356 100644
> > --- a/drivers/gpu/drm/amd/display/dc/dc.h
> > +++ b/drivers/gpu/drm/amd/display/dc/dc.h
> > @@ -118,7 +118,26 @@ struct dc_plane_cap {
> > uint32_t min_height;
> > };
> >
> > -// Color management caps (DPP and MPC)
> > +/**
> > + * DOC: color-management-caps
> > + *
> > + * **Color management caps (DPP and MPC)**
> > + *
> > + * Modules/color calculates various colour operations which are translated to
> > + * abstracted HW. DCE 5-12 had almost no important changes, but starting with
> > + * DCN1, every new generation comes with fairly major differences in color
> > + * pipeline. Therefore, we abstract color pipe capabilities so modules/DM can
> > + * decide mapping to HW block based on logical capabilities.
> > + */
> > +
> > +/**
> > + * struct rom_curve_caps - predefined transfer function caps for degamma and regamma
> > + * @srgb: RGB color space transfer func
> > + * @bt2020: BT.2020 transfer func
> > + * @gamma2_2: standard gamma
> > + * @pq: perceptual quantizer transfer function
> > + * @hlg: hybrid log–gamma transfer function
> > + */
> > struct rom_curve_caps {
> > uint16_t srgb : 1;
> > uint16_t bt2020 : 1;
> > @@ -127,6 +146,24 @@ struct rom_curve_caps {
> > uint16_t hlg : 1;
> > };
> >
> > +/**
> > + * struct dpp_color_caps - color pipeline capabilities for display pipe and plane blocks
> > + *
> > + * @dcn_arch: all DCE generations treated the same
>
> You seem to copy-paste comments from the struct into the kernel-doc.
> In that case please delete the original comment to avoid duplication
> (and therefore confusion once someone changes things).
>
> > + * @input_lut_shared: shared with DGAM. Input lut is different than most LUTs,
> > + * just plain 256-entry lookup
> > + * @icsc: input color space convertion
>
> /s/convertion/conversion
>
> Same on the next line.
>
Thanks for reviewing both documentation patches. I'll separate them from
this 3D LUT series, apply your suggestions and send it soon.
Melissa
> Harry
>
> > + * @post_csc: post color space convertion, before gamut remap
> > + * @gamma_corr: degamma correction
> > + * @hw_3d_lut: 3d lut support. It implies a shaper LUT before, it may be shared
> > + * with MPC by setting mpc:shared_3d_lut flag
> > + * @ogam_ram: blend gamma
> > + * @ocsc: output color space convertion
> > + * @dgam_rom_caps: caps for degamma
> > + * @ogam_rom_caps: caps for regamma 1D lut
> > + *
> > + * Note: hdr_mult and gamut remap (ctm) are always available in DPP (in that order)
> > + */
> > struct dpp_color_caps {
> > uint16_t dcn_arch : 1; // all DCE generations treated the same
> > // input lut is different than most LUTs, just plain 256-entry lookup
> > @@ -147,6 +184,15 @@ struct dpp_color_caps {
> > struct rom_curve_caps ogam_rom_caps;
> > };
> >
> > +/**
> > + * struct mpc_color_caps - color pipeline capabilities for multiple pipe and plane combined blocks
> > + *
> > + * @gamut_remap: color transformation matrix
> > + * @ocsc: output color space convertion matrix
> > + * @num_3dluts: 3d lut, always assumes a preceding shaper LUT
> > + * @shared_3d_lut: shared 3d lut flag, can be either DPP or MPC, but single instance
> > + * @ogam_rom_caps: caps for regama 1d lut
> > + */
> > struct mpc_color_caps {
> > uint16_t gamut_remap : 1;
> > uint16_t ogam_ram : 1;
> > @@ -157,6 +203,11 @@ struct mpc_color_caps {
> > struct rom_curve_caps ogam_rom_caps;
> > };
> >
> > +/**
> > + * struct dc_color_caps - color pipes capabilities for DPP and MPC hw blocks
> > + * @dpp: color pipes caps for DPP
> > + * @mpc: color pipes caps for MPC
> > + */
> > struct dc_color_caps {
> > struct dpp_color_caps dpp;
> > struct mpc_color_caps mpc;
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