[PATCH V2 05/12] drm: bridge: icn6211: Add generic DSI-to-DPI PLL configuration

[Maxime Ripard]

On Thu, Feb 17, 2022 at 01:25:23AM +0100, Marek Vasut wrote:
> The chip contains fractional PLL, however the driver currently hard-codes
> one specific PLL setting. Implement generic PLL parameter calculation code,
> so any DPI panel with arbitrary pixel clock can be attached to this bridge.
> 
> The datasheet for this bridge is not available, the PLL behavior has been
> inferred from [1] and [2] and by analyzing the DPI pixel clock with scope.
> The PLL limits might be wrong, but at least the calculated values match all
> the example code available. This is better than one hard-coded pixel clock
> value anyway.
> 
> [1] https://github.com/rockchip-linux/kernel/blob/develop-4.19/drivers/gpu/drm/bridge/icn6211.c
> [2] https://github.com/tdjastrzebski/ICN6211-Configurator
> 
> Signed-off-by: Marek Vasut <marex at denx.de>
> Cc: Jagan Teki <jagan at amarulasolutions.com>
> Cc: Maxime Ripard <maxime at cerno.tech>
> Cc: Robert Foss <robert.foss at linaro.org>
> Cc: Sam Ravnborg <sam at ravnborg.org>
> Cc: Thomas Zimmermann <tzimmermann at suse.de>
> To: dri-devel at lists.freedesktop.org

Acked-by: Maxime Ripard <maxime at cerno.tech>

Maxime
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