[PATCH v8 09/24] drm/rockchip: dw_hdmi: Add support for niu clk

[Dmitry Osipenko]

On 3/14/22 11:18, Sascha Hauer wrote:
> On Sun, Mar 13, 2022 at 12:07:56AM +0300, Dmitry Osipenko wrote:
>> On 3/11/22 11:33, Sascha Hauer wrote:
>>> The rk3568 HDMI has an additional clock that needs to be enabled for the
>>> HDMI controller to work. This clock is not needed for the HDMI
>>> controller itself, but to make the SoC internal bus logic work. From the
>>> reference manual:
>>>
>>>> 2.8.6 NIU Clock gating reliance
>>>>
>>>> A part of niu clocks have a dependence on another niu clock in order to
>>>> sharing the internal bus. When these clocks are in use, another niu
>>>> clock must be opened, and cannot be gated.  These clocks and the special
>>>> clock on which they are relied are as following:
>>>>
>>>> Clocks which have dependency     The clock which can not be gated
>>>> -----------------------------------------------------------------
>>>> ...
>>>> pclk_vo_niu, hclk_vo_s_niu       hclk_vo_niu
>>>> ...
>>> The clock framework does not support turning on a clock whenever another
>>> clock is turned on, so this patch adds support for the dependent clock
>>> to the HDMI driver. We call it "NIU", which is for "Native Interface
>>> Unit"
>>
>> This still doesn't make sense to me. You're saying that "pclk_vo_niu,
>> hclk_vo_s_niu" depend on "hclk_vo_niu", but HDMI doesn't use pclk_vo, it
>> uses pclk_hdmi.
> 
> pclk_hdmi_host is a child clock of pclk_vo:
> 
>      aclk_vo                  2        2        0   300000000          0     0  50000         Y
>         aclk_hdcp             0        0        0   300000000          0     0  50000         N
>         pclk_vo               2        3        0    75000000          0     0  50000         Y
>            pclk_edp_ctrl      0        0        0    75000000          0     0  50000         N
>            pclk_dsitx_1       0        0        0    75000000          0     0  50000         N
>            pclk_dsitx_0       1        2        0    75000000          0     0  50000         Y
>            pclk_hdmi_host     1        2        0    75000000          0     0  50000         Y
>            pclk_hdcp          0        0        0    75000000          0     0  50000         N
>         hclk_vo               2        5        0   150000000          0     0  50000         Y
>            hclk_hdcp          0        0        0   150000000          0     0  50000         N
>            hclk_vop           0        2        0   150000000          0     0  50000         N

It was unclear that the pclk_hdmi is the child of pclk_vo by looking at
the clk driver's code, thank you!

Won't be better if the implicit clk dependency would be handled
internally by the RK clk driver? For example, by making the common gate
shared/refcounted. Have you considered this variant? Then we won't need
to change the DT bindings.