[PATCH 1/3] drm/i915: Report steering details in debugfs
Souza, Jose
jose.souza at intel.com
Tue Mar 15 16:25:40 UTC 2022
On Mon, 2022-03-14 at 16:42 -0700, Matt Roper wrote:
> Add a new 'steering' node in each gt's debugfs directory that tells
> whether we're using explicit steering for various types of MCR ranges
> and, if so, what MMIO ranges it applies to.
>
> We're going to be transitioning away from implicit steering, even for
> slice/dss steering soon, so the information reported here will become
> increasingly valuable once that happens.
>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_gt.c | 46 +++++++++++++++++++++
> drivers/gpu/drm/i915/gt/intel_gt.h | 2 +
> drivers/gpu/drm/i915/gt/intel_gt_debugfs.c | 13 ++++++
> drivers/gpu/drm/i915/gt/intel_gt_types.h | 5 +++
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 8 +++-
> 5 files changed, 73 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 8a2483ccbfb9..041add4019fc 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -96,6 +96,12 @@ int intel_gt_assign_ggtt(struct intel_gt *gt)
> return gt->ggtt ? 0 : -ENOMEM;
> }
>
> +const char *intel_steering_types[] = {
missing static as kernel test bot reported.
with that fixed: Reviewed-by: José Roberto de Souza <jose.souza at intel.com>
> + "L3BANK",
> + "MSLICE",
> + "LNCF",
> +};
> +
> static const struct intel_mmio_range icl_l3bank_steering_table[] = {
> { 0x00B100, 0x00B3FF },
> {},
> @@ -932,6 +938,46 @@ u32 intel_gt_read_register(struct intel_gt *gt, i915_reg_t reg)
> return intel_uncore_read(gt->uncore, reg);
> }
>
> +static void report_steering_type(struct drm_printer *p,
> + struct intel_gt *gt,
> + enum intel_steering_type type,
> + bool dump_table)
> +{
> + const struct intel_mmio_range *entry;
> + u8 slice, subslice;
> +
> + BUILD_BUG_ON(ARRAY_SIZE(intel_steering_types) != NUM_STEERING_TYPES);
> +
> + if (!gt->steering_table[type]) {
> + drm_printf(p, "%s steering: uses default steering\n",
> + intel_steering_types[type]);
> + return;
> + }
> +
> + intel_gt_get_valid_steering(gt, type, &slice, &subslice);
> + drm_printf(p, "%s steering: sliceid=0x%x, subsliceid=0x%x\n",
> + intel_steering_types[type], slice, subslice);
> +
> + if (!dump_table)
> + return;
> +
> + for (entry = gt->steering_table[type]; entry->end; entry++)
> + drm_printf(p, "\t0x%06x - 0x%06x\n", entry->start, entry->end);
> +}
> +
> +void intel_gt_report_steering(struct drm_printer *p, struct intel_gt *gt,
> + bool dump_table)
> +{
> + drm_printf(p, "Default steering: sliceid=0x%x, subsliceid=0x%x\n",
> + gt->default_steering.groupid,
> + gt->default_steering.instanceid);
> +
> + if (HAS_MSLICES(gt->i915)) {
> + report_steering_type(p, gt, MSLICE, dump_table);
> + report_steering_type(p, gt, LNCF, dump_table);
> + }
> +}
> +
> void intel_gt_info_print(const struct intel_gt_info *info,
> struct drm_printer *p)
> {
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
> index 0f571c8ee22b..3edece1865e4 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
> @@ -87,6 +87,8 @@ static inline bool intel_gt_needs_read_steering(struct intel_gt *gt,
> u32 intel_gt_read_register_fw(struct intel_gt *gt, i915_reg_t reg);
> u32 intel_gt_read_register(struct intel_gt *gt, i915_reg_t reg);
>
> +void intel_gt_report_steering(struct drm_printer *p, struct intel_gt *gt,
> + bool dump_table);
> void intel_gt_info_print(const struct intel_gt_info *info,
> struct drm_printer *p);
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
> index f103664b71d4..6f45b131a001 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
> @@ -6,6 +6,7 @@
> #include <linux/debugfs.h>
>
> #include "i915_drv.h"
> +#include "intel_gt.h"
> #include "intel_gt_debugfs.h"
> #include "intel_gt_engines_debugfs.h"
> #include "intel_gt_pm_debugfs.h"
> @@ -57,10 +58,22 @@ static int __intel_gt_debugfs_reset_store(void *data, u64 val)
> DEFINE_SIMPLE_ATTRIBUTE(reset_fops, __intel_gt_debugfs_reset_show,
> __intel_gt_debugfs_reset_store, "%llu\n");
>
> +static int steering_show(struct seq_file *m, void *data)
> +{
> + struct drm_printer p = drm_seq_file_printer(m);
> + struct intel_gt *gt = m->private;
> +
> + intel_gt_report_steering(&p, gt, true);
> +
> + return 0;
> +}
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(steering);
> +
> static void gt_debugfs_register(struct intel_gt *gt, struct dentry *root)
> {
> static const struct intel_gt_debugfs_file files[] = {
> { "reset", &reset_fops, NULL },
> + { "steering", &steering_fops },
> };
>
> intel_gt_debugfs_register_files(root, files, ARRAY_SIZE(files), gt);
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> index f20687796490..7781ab84e7a3 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> @@ -182,6 +182,11 @@ struct intel_gt {
>
> const struct intel_mmio_range *steering_table[NUM_STEERING_TYPES];
>
> + struct {
> + u8 groupid;
> + u8 instanceid;
> + } default_steering;
> +
> struct intel_gt_info {
> intel_engine_mask_t engine_mask;
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index beca8735bae5..c328d46f8095 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -1072,9 +1072,15 @@ static void __set_mcr_steering(struct i915_wa_list *wal,
> static void __add_mcr_wa(struct intel_gt *gt, struct i915_wa_list *wal,
> unsigned int slice, unsigned int subslice)
> {
> - drm_dbg(>->i915->drm, "MCR slice=0x%x, subslice=0x%x\n", slice, subslice);
> + struct drm_printer p = drm_debug_printer("MCR Steering:");
>
> __set_mcr_steering(wal, GEN8_MCR_SELECTOR, slice, subslice);
> +
> + gt->default_steering.groupid = slice;
> + gt->default_steering.instanceid = subslice;
> +
> + if (drm_debug_enabled(DRM_UT_DRIVER))
> + intel_gt_report_steering(&p, gt, false);
> }
>
> static void
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