[PATCH 2/3] drm/i915/guc: add steering info to GuC register save/restore list

[Lucas De Marchi]

On Mon, Mar 14, 2022 at 04:42:02PM -0700, Matt Roper wrote:
>From: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
>
>GuC has its own steering mechanism and can't use the default set by i915,
>so we need to provide the steering information that the FW will need to
>save/restore registers while processing an engine reset. The GUC
>interface allows us to do so as part of the register save/restore list
>and it requires us to specify the steering for all multicast register, even
>those that would be covered by the default setting for cpu access. Given
>that we do not distinguish between registers that do not need steering and
>registers that are guaranteed to work the default steering, we set the
>steering for all entries in the guc list that do not require a special
>steering (e.g. mslice) to the default settings; this will cost us a few
>extra writes during engine reset but allows us to keep the steering
>logic simple.
>
>Cc: John Harrison <John.C.Harrison at Intel.com>
>Cc: Matt Roper <matthew.d.roper at intel.com>
>Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
>Signed-off-by: Matt Roper <matthew.d.roper at intel.com>


Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>

Lucas De Marchi