[PATCH v2] drm/bridge: anx7625: Set downstream sink into normal status

Pin-yen Lin treapking at chromium.org
Tue Mar 22 08:52:08 UTC 2022


The DRM_DEV_* macros have been deprecated:
https://www.kernel.org/doc/html/latest/gpu/drm-internals.html#c.DRM_DEV_DEBUG_DRIVER

On Tue, Mar 22, 2022 at 4:43 PM Hsin-Yi Wang <hsinyi at chromium.org> wrote:
>
> On Tue, Mar 22, 2022 at 4:02 PM Xin Ji <xji at analogixsemi.com> wrote:
> >
> > As downstream sink was set into standby mode while bridge disabled,
> > this patch used for setting downstream sink into normal status
> > while enable bridge.
> >
> > Signed-off-by: Xin Ji <xji at analogixsemi.com>
> > Reviewed-by: Pin-Yen Lin <treapking at chromium.org>
> >
> > ---
> > V1 -> V2: use dev_dbg replace of dev_info
> > ---
> >  drivers/gpu/drm/bridge/analogix/anx7625.c | 8 ++++++++
> >  1 file changed, 8 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c
> > index 9a2a19ad4202..dcf3275a00fe 100644
> > --- a/drivers/gpu/drm/bridge/analogix/anx7625.c
> > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c
> > @@ -924,12 +924,20 @@ static void anx7625_dp_start(struct anx7625_data *ctx)
> >  {
> >         int ret;
> >         struct device *dev = &ctx->client->dev;
> > +       u8 data;
> >
> >         if (!ctx->display_timing_valid) {
> >                 DRM_DEV_ERROR(dev, "mipi not set display timing yet.\n");
> >                 return;
> >         }
> >
> > +       dev_dbg(dev, "set downstream sink into normal\n");
> > +       /* Downstream sink enter into normal mode */
> > +       data = 1;
> > +       ret = anx7625_aux_trans(ctx, DP_AUX_NATIVE_WRITE, 0x000600, 1, &data);
> > +       if (ret < 0)
> > +               dev_err(dev, "IO error : set sink into normal mode fail\n");
> > +
>
> The driver uses DRM_DEV_* for logs. Can we use this?
>
> >         /* Disable HDCP */
> >         anx7625_write_and(ctx, ctx->i2c.rx_p1_client, 0xee, 0x9f);
> >
> > --
> > 2.25.1
> >


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