[PATCH v3 07/10] dt-bindings: phy: Add Cadence HDP-TX DP PHY
Sandor Yu
Sandor.yu at nxp.com
Tue Nov 8 13:00:10 UTC 2022
Add bindings for Cadence HDP-TX DisplayPort PHY.
Signed-off-by: Sandor Yu <Sandor.yu at nxp.com>
---
.../bindings/phy/cdns,hdptx-dp-phy.yaml | 66 +++++++++++++++++++
1 file changed, 66 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/cdns,hdptx-dp-phy.yaml
diff --git a/Documentation/devicetree/bindings/phy/cdns,hdptx-dp-phy.yaml b/Documentation/devicetree/bindings/phy/cdns,hdptx-dp-phy.yaml
new file mode 100644
index 000000000000..8f9b8ba7d1c6
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/cdns,hdptx-dp-phy.yaml
@@ -0,0 +1,66 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/cdns,hdptx-dp-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cadence HDP-TX(HDMI/DisplayPort) PHY for DisplayPort protocol
+
+maintainers:
+ - Sandor Yu <sandor.yu at nxp.com>
+
+properties:
+ compatible:
+ enum:
+ - cdns,hdptx-dp-phy
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ description:
+ PHY reference clock.
+
+ clock-names:
+ items:
+ - const: refclk
+
+ "#phy-cells":
+ const: 0
+
+ cdns,num-lanes:
+ description:
+ Number of lanes.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [1, 2, 3, 4]
+ default: 4
+
+ cdns,max-bit-rate:
+ description:
+ Maximum DisplayPort link bit rate to use, in Mbps
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [2160, 2430, 2700, 3240, 4320, 5400]
+ default: 5400
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - "#phy-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/phy/phy.h>
+ dp_phy: phy at 32c00000 {
+ compatible = "cdns,hdptx-dp-phy";
+ reg = <0x32c00000 0x100000>;
+ #phy-cells = <0>;
+ clocks = <&hdmi_phy_27m>;
+ clock-names = "refclk";
+ cdns,num-lanes = <4>;
+ cdns,max-bit-rate = <5400>;
+ };
--
2.34.1
More information about the dri-devel
mailing list