[PATCH v8 01/14] drm: exynos: dsi: Fix MIPI_DSI*_NO_* mode flags

Jagan Teki jagan at amarulasolutions.com
Fri Nov 11 12:45:45 UTC 2022


On Fri, Nov 11, 2022 at 5:42 PM Nicolas Boichat <drinkcat at chromium.org> wrote:
>
> On Fri, Nov 11, 2022 at 4:49 PM Jagan Teki <jagan at amarulasolutions.com> wrote:
> >
> > On Fri, Nov 11, 2022 at 6:19 AM Nicolas Boichat <drinkcat at chromium.org> wrote:
> > >
> > > On Fri, Nov 11, 2022 at 2:40 AM Jagan Teki <jagan at amarulasolutions.com> wrote:
> > > >
> > > > HFP/HBP/HSA/EOT_PACKET modes in Exynos DSI host specifies
> > > > 0 = Enable and 1 = Disable.
> > >
> > > Oh I see, that's confusing... IMHO you might want to change the
> > > register macro name... (but if that's what the datasheet uses, it
> > > might not be ideal either). At the _very_ least, I'd add a comment in
> > > the code so the next person doesn't attempt to "fix" it again...
> >
> > 02/14 on the same series doing the name change.
> > https://lore.kernel.org/all/20221110183853.3678209-3-jagan@amarulasolutions.com/
>
> Oh thanks I wasn't cc'ed on that one, makes sense.
>
> You can add my reviewed tag to this one, as my HSE comment doesn't change this.
>
> Reviewed-by: Nicolas Boichat <drinkcat at chromium.org>
>
> But please double check HSE.
>
> >
> > >
> > > BTW, are you sure DSIM_HSE_MODE is correct now?
> >
> > Yes, we have tested in imx8m platforms as well. Sébastien Szymanski
> > initially observed this issue on the imx8m platform.
>
> I'll repeat, are you sure about HSE specifically? You invert the
> polarity for HBP, HFP, and HSA, which makes sense given your patch
> 02/14.
>
> I'm concerned about HSE. Is the bit really a disable bit?
> MIPI_DSI_MODE_VIDEO_HSE is supposed to be an enable flag, so you
> should not do `reg |= DSIM_HSE_DISABLE;`, probably.

HSE typically enables bit logic, unlike other bits which are disabled bits.

HseDisableMod:
In Vsync pulse and Vporch area, MIPI DSI master transfers only Hsync
start packet to MIPI DSI slave at
MIPI DSI spec 1.1r02. This bit transfers Hsync end packet in Vsync
pulse and Vporch area (optional).
0 = Disables transfer
1 = Enables transfer

HfpDisableMode:
Specifies HFP disable mode. If this bit set, DSI master ignores HFP
area in Video mode.
0 = Enables
1 = Disables

I think the naming of 'HseDisableMod' is misleading in the datasheet,
but I have used it as per the spec.

Jagan.


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