[PATCH v1 6/8] drm: rcar-du: Add r8a779g0 support

[Laurent Pinchart]

On Thu, Nov 17, 2022 at 03:08:38PM +0000, Kieran Bingham wrote:
> Quoting Tomi Valkeinen (2022-11-17 12:25:45)
> > From: Tomi Valkeinen <tomi.valkeinen+renesas at ideasonboard.com>
> > 
> > Add support for DU on r8a779g0, which is identical to DU on r8a779a0.
> > 
> > Signed-off-by: Tomi Valkeinen <tomi.valkeinen+renesas at ideasonboard.com>
> > ---
> >  drivers/gpu/drm/rcar-du/rcar_du_drv.c | 22 ++++++++++++++++++++++
> >  1 file changed, 22 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
> > index d003e8d9e7a2..b1761d4ec4e5 100644
> > --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
> > +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
> > @@ -524,6 +524,27 @@ static const struct rcar_du_device_info rcar_du_r8a779a0_info = {
> >         .dsi_clk_mask =  BIT(1) | BIT(0),
> >  };
> >  
> > +static const struct rcar_du_device_info rcar_du_r8a779g0_info = {
> > +       .gen = 3,
> 
> Given that this is the V4H ... I wonder if this should be bumped
> already. I guess that has knock on effects through the driver though...

rcar_du_group_setup_didsr() would need to be fixed to test gen >= 3
instead of gen == 3. That seems to be the only problematic location. It
could thus fairly easily be done in v2, but we can also delay it.

> Aside from that, Which may need more work to handle correctly:
> 
> Reviewed-by: Kieran Bingham <kieran.bingham+renesas at ideasonboard.com>

Reviewed-by: Laurent Pinchart <laurent.pinchart at ideasonboard.com>

> > +       .features = RCAR_DU_FEATURE_CRTC_IRQ
> > +                 | RCAR_DU_FEATURE_VSP1_SOURCE
> > +                 | RCAR_DU_FEATURE_NO_BLENDING,
> > +       .channels_mask = BIT(1) | BIT(0),
> > +       .routes = {
> > +               /* R8A779G0 has two MIPI DSI outputs. */
> > +               [RCAR_DU_OUTPUT_DSI0] = {
> > +                       .possible_crtcs = BIT(0),
> > +                       .port = 0,
> > +               },
> > +               [RCAR_DU_OUTPUT_DSI1] = {
> > +                       .possible_crtcs = BIT(1),
> > +                       .port = 1,
> > +               },
> > +       },
> > +       .num_rpf = 5,
> > +       .dsi_clk_mask =  BIT(1) | BIT(0),
> > +};
> > +
> >  static const struct of_device_id rcar_du_of_table[] = {
> >         { .compatible = "renesas,du-r8a7742", .data = &rcar_du_r8a7790_info },
> >         { .compatible = "renesas,du-r8a7743", .data = &rzg1_du_r8a7743_info },
> > @@ -549,6 +570,7 @@ static const struct of_device_id rcar_du_of_table[] = {
> >         { .compatible = "renesas,du-r8a77990", .data = &rcar_du_r8a7799x_info },
> >         { .compatible = "renesas,du-r8a77995", .data = &rcar_du_r8a7799x_info },
> >         { .compatible = "renesas,du-r8a779a0", .data = &rcar_du_r8a779a0_info },
> > +       { .compatible = "renesas,du-r8a779g0", .data = &rcar_du_r8a779g0_info },
> >         { }
> >  };
> >  

-- 
Regards,

Laurent Pinchart