[v5] drm/msm/disp/dpu1: add support for dspp sub block flush in sc7280

[Dmitry Baryshkov]

On Sat, 1 Oct 2022 at 17:25, Kalyan Thota <kalyant at qti.qualcomm.com> wrote:
>
>
> >-----Original Message-----
> >From: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
> >Sent: Friday, September 30, 2022 1:59 PM
> >To: Doug Anderson <dianders at chromium.org>; Kalyan Thota (QUIC)
> ><quic_kalyant at quicinc.com>
> >Cc: y at qualcomm.com; dri-devel <dri-devel at lists.freedesktop.org>; linux-arm-
> >msm <linux-arm-msm at vger.kernel.org>; freedreno
> ><freedreno at lists.freedesktop.org>; open list:OPEN FIRMWARE AND FLATTENED
> >DEVICE TREE BINDINGS <devicetree at vger.kernel.org>; LKML <linux-
> >kernel at vger.kernel.org>; Rob Clark <robdclark at gmail.com>; Stephen Boyd
> ><swboyd at chromium.org>; Vinod Polimera (QUIC)
> ><quic_vpolimer at quicinc.com>; Abhinav Kumar (QUIC)
> ><quic_abhinavk at quicinc.com>
> >Subject: Re: [v5] drm/msm/disp/dpu1: add support for dspp sub block flush in
> >sc7280
> >
> >WARNING: This email originated from outside of Qualcomm. Please be wary of
> >any links or attachments, and do not enable macros.
> >
> >On 29 September 2022 19:13:20 GMT+03:00, Doug Anderson
> ><dianders at chromium.org> wrote:
> >>Hi,
> >>
> >>On Wed, Sep 14, 2022 at 5:16 AM Kalyan Thota <quic_kalyant at quicinc.com>
> >wrote:
> >>>
> >>> Flush mechanism for DSPP blocks has changed in sc7280 family, it
> >>> allows individual sub blocks to be flushed in coordination with
> >>> master flush control.
> >>>
> >>> Representation: master_flush && (PCC_flush | IGC_flush .. etc )
> >>>
> >>> This change adds necessary support for the above design.
> >>>
> >>> Changes in v1:
> >>> - Few nits (Doug, Dmitry)
> >>> - Restrict sub-block flush programming to dpu_hw_ctl file (Dmitry)
> >>>
> >>> Changes in v2:
> >>> - Move the address offset to flush macro (Dmitry)
> >>> - Seperate ops for the sub block flush (Dmitry)
> >>>
> >>> Changes in v3:
> >>> - Reuse the DPU_DSPP_xx enum instead of a new one (Dmitry)
> >>>
> >>> Changes in v4:
> >>> - Use shorter version for unsigned int (Stephen)
> >>>
> >>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
> >>> ---
> >>>  drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c       |  2 +-
> >>>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c |  5 +++-
> >>> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h |  4 +++
> >>>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c     | 35
> >++++++++++++++++++++++++--
> >>>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h     | 10 ++++++--
> >>>  5 files changed, 50 insertions(+), 6 deletions(-)
> >>
> >>Breadcrumbs: though this is tagged in the subject as v5 I think the
> >>newest version is actually "resend v4" [1] which just fixes the
> >>Signed-off-by.
> >
> >Not to mention that v5 misses the S-o-B tag.
> >
> >>
> >>[1]
> >>https://lore.kernel.org/r/1663825463-6715-1-git-send-email-quic_kalyant
> >>@quicinc.com
> >
> Latest one is https://lore.kernel.org/r/1663825463-6715-1-git-send-email-quic_kalyant@quicinc.com that I last posted.
> Don’t recollect on why tag was marked as v5. To avoid confusion, shall I resend it again ?

Currently I see v5 and after that comes a resend of v4.

So, please send v6 with all the tags being present, no y@ in the
msg-id/in-reply-to/etc.


-- 
With best wishes
Dmitry