[PATCH 0/2] i915: CAGF and RC6 changes for MTL

Badal Nilawar badal.nilawar at intel.com
Mon Sep 19 11:59:04 UTC 2022


This series includes the code changes to get CAGF, RC State and 
C6 Residency of MTL.

v2: Included "Use GEN12 RPSTAT register" patch 

v3: 
  - Rebased
  - Dropped "Use GEN12 RPSTAT register" patch from this series
    going to send separate series for it

Badal Nilawar (2):
  drm/i915/mtl: Modify CAGF functions for MTL
  drm/i915/mtl: Add C6 residency support for MTL SAMedia

 drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 60 +++++++++++++++++++
 drivers/gpu/drm/i915/gt/intel_gt_regs.h       | 18 ++++++
 drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c   |  9 ++-
 drivers/gpu/drm/i915/gt/intel_rc6.c           |  5 +-
 drivers/gpu/drm/i915/gt/intel_rps.c           |  6 +-
 drivers/gpu/drm/i915/gt/selftest_rc6.c        |  9 ++-
 drivers/gpu/drm/i915/i915_pmu.c               |  8 ++-
 7 files changed, 110 insertions(+), 5 deletions(-)

-- 
2.25.1



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