[PATCH v3 34/65] clk: ux500: prcmu: Add a determine_rate hook
Linus Walleij
linus.walleij at linaro.org
Tue Apr 4 13:44:25 UTC 2023
On Tue, Apr 4, 2023 at 2:45 PM Maxime Ripard <maxime at cerno.tech> wrote:
> The UX500 PRCMU "clkout" clock implements a mux with a set_parent hook,
> but doesn't provide a determine_rate implementation.
>
> This is a bit odd, since set_parent() is there to, as its name implies,
> change the parent of a clock. However, the most likely candidate to
> trigger that parent change is a call to clk_set_rate(), with
> determine_rate() figuring out which parent is the best suited for a
> given rate.
Not even that.
The parent is selected from the second cell of the device tree
specifier, and the divisor from the third cell. See:
Documentation/devicetree/bindings/clock/stericsson,u8500-clks.yaml
So this definitely does not reparent.
Yours,
Linus Walleij
More information about the dri-devel
mailing list