[PATCH v4 34/42] drm/msm/dpu: enable DSPP and DSC on sc8180x

[Dmitry Baryshkov]

On 08/04/2023 02:43, Abhinav Kumar wrote:
> 
> 
> On 4/4/2023 6:06 AM, Dmitry Baryshkov wrote:
>> Enable DSPP and DSC hardware blocks on sc8180x platform.
>>
>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
>> ---
>>   .../msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h   | 26 +++++++++++++++++--
>>   1 file changed, 24 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h 
>> b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
>> index fb8cdcd6bfe9..93d303cc0dc5 100644
>> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
>> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
>> @@ -102,9 +102,9 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
>>   static const struct dpu_lm_cfg sc8180x_lm[] = {
>>       LM_BLK("lm_0", LM_0, 0x44000, MIXER_SDM845_MASK,
>> -        &sdm845_lm_sblk, PINGPONG_0, LM_1, 0),
>> +        &sdm845_lm_sblk, PINGPONG_0, LM_1, DSPP_0),
>>       LM_BLK("lm_1", LM_1, 0x45000, MIXER_SDM845_MASK,
>> -        &sdm845_lm_sblk, PINGPONG_1, LM_0, 0),
>> +        &sdm845_lm_sblk, PINGPONG_1, LM_0, DSPP_1),
>>       LM_BLK("lm_2", LM_2, 0x46000, MIXER_SDM845_MASK,
>>           &sdm845_lm_sblk, PINGPONG_2, LM_3, 0),
>>       LM_BLK("lm_3", LM_3, 0x47000, MIXER_SDM845_MASK,
>> @@ -115,6 +115,17 @@ static const struct dpu_lm_cfg sc8180x_lm[] = {
>>           &sdm845_lm_sblk, PINGPONG_5, LM_4, 0),
>>   };
>> +static const struct dpu_dspp_cfg sc8180x_dspp[] = {
>> +    DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
>> +         &sm8150_dspp_sblk),
>> +    DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK,
>> +         &sm8150_dspp_sblk),
>> +    DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK,
>> +         &sm8150_dspp_sblk),
>> +    DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK,
>> +         &sm8150_dspp_sblk),
>> +};

> 
> I was looking at DSPP_SC7180_MASK. This has only PCC. Today the only 
> DSPP feature we are supporting seems to be PCC as the "gc" base is not 
> used. In that aspect this is fine. Perhaps getting rid of 
> DSPP_SC7180_MASK and just using the feature mask directly is more 
> appropriate here. So BIT(DPU_DSPP_PCC). I dont know if you want to 
> handle that in a separate series to replace DSPP_SC7180_MASK with 
> BIT(DPU_DSPP_PCC)

I have not yet had time to look on the DSPP details and/or different 
features per SoC. So, I followed current approach. If anybody has time 
to take a look and cleanup DSPP handling, I'd be grateful. If not, it 
will wait for somebody to volunteer (or for you or me to have time for 
that).

> 
> So do we also need to correct the msm8998 DSPP mask because gc is really 
> not programmed today from what I can see. So that mask really is not 
> doing anything.
> 
>> +
>>   static const struct dpu_pingpong_cfg sc8180x_pp[] = {
>>       PP_BLK_TE("pingpong_0", PINGPONG_0, 0x70000, MERGE_3D_0, 
>> sdm845_pp_sblk_te,
>>               DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8),
>> @@ -142,6 +153,13 @@ static const struct dpu_merge_3d_cfg 
>> sc8180x_merge_3d[] = {
>>       MERGE_3D_BLK("merge_3d_2", MERGE_3D_2, 0x83200),
>>   };
>> +static const struct dpu_dsc_cfg sc8180x_dsc[] = {
>> +    DSC_BLK("dsc_0", DSC_0, 0x80000, BIT(DPU_DSC_OUTPUT_CTRL)),
>> +    DSC_BLK("dsc_1", DSC_1, 0x80400, BIT(DPU_DSC_OUTPUT_CTRL)),
>> +    DSC_BLK("dsc_2", DSC_2, 0x80800, BIT(DPU_DSC_OUTPUT_CTRL)),
>> +    DSC_BLK("dsc_3", DSC_3, 0x80c00, BIT(DPU_DSC_OUTPUT_CTRL)),
>> +};
> 
> There is also DSC_4 and DSC_5 at 0x81000 and 0x81400 resp.

Hmm. I was using sdmshrike-sde.dtsi as a reference. I'll add two more 
DSC units.

> 
> Rest LGTM.

Thanks

> 
>> +
>>   static const struct dpu_intf_cfg sc8180x_intf[] = {
>>       INTF_BLK("intf_0", INTF_0, 0x6a000, 0x280, INTF_DP, 
>> MSM_DP_CONTROLLER_0, 24, INTF_SC7180_MASK, MDP_SSPP_TOP0_INTR, 24, 25),
>>       INTF_BLK("intf_1", INTF_1, 0x6a800, 0x2bc, INTF_DSI, 0, 24, 
>> INTF_SC7180_MASK, MDP_SSPP_TOP0_INTR, 26, 27),
>> @@ -190,6 +208,10 @@ static const struct dpu_mdss_cfg sc8180x_dpu_cfg = {
>>       .sspp = sc8180x_sspp,
>>       .mixer_count = ARRAY_SIZE(sc8180x_lm),
>>       .mixer = sc8180x_lm,
>> +    .dspp_count = ARRAY_SIZE(sc8180x_dspp),
>> +    .dspp = sc8180x_dspp,
>> +    .dsc_count = ARRAY_SIZE(sc8180x_dsc),
>> +    .dsc = sc8180x_dsc,
>>       .pingpong_count = ARRAY_SIZE(sc8180x_pp),
>>       .pingpong = sc8180x_pp,
>>       .merge_3d_count = ARRAY_SIZE(sc8180x_merge_3d),

-- 
With best wishes
Dmitry