[PATCH 4/6] drm: bridge: samsung-dsim: Dynamically configure DPHY timing
Marek Vasut
marex at denx.de
Sun Apr 16 22:12:29 UTC 2023
On 4/15/23 12:41, Adam Ford wrote:
> NXP uses a lookup table to determine the various values for
> the PHY Timing based on the clock rate in their downstream
> kernel. Since the input clock can be variable, the phy
> settings need to be variable too. Add an additional variable
> to the driver data to enable this feature to prevent breaking
> boards that don't support it.
Isn't there already a generic LP2HS transition time calculation in the
kernel ?
This looks like a generic calculation which should be done by all the
DSI hosts, so why not introduce a generic helper to do such a
calculation (and not a table please) ?
More information about the dri-devel
mailing list