[Intel-gfx] [PATCH 2/8] drm/i915/mtl: Define MOCS and PAT tables for MTL

[Yang, Fei]

>> On MTL, GT can no longer allocate on LLC - only the CPU can.
>> This, along with addition of support for L4 cache calls a
> s/calls a/calls for a

Will update

>> MOCS/PAT table update.
>> Alos the PAT index registers are multicasted for primary GT,
> s/Alos/Also
>> and there is an address jump from index 7 to 8. This patch makes sure 
>> these registers are programmed in the proper way.
>
> "Makes sure that"

Will update.