[PATCH 6/8] drm/i915: preparation for using PAT index
Andi Shyti
andi.shyti at linux.intel.com
Wed Apr 19 22:12:36 UTC 2023
Hi Fei,
On Wed, Apr 19, 2023 at 02:12:17PM -0700, fei.yang at intel.com wrote:
> From: Fei Yang <fei.yang at intel.com>
>
> This patch is a preparation for replacing enum i915_cache_level with PAT
> index. Caching policy for buffer objects is set through the PAT index in
> PTE, the old i915_cache_level is not sufficient to represent all caching
> modes supported by the hardware.
>
> Preparing the transition by adding some platform dependent data structures
> and helper functions to translate the cache_level to pat_index.
>
> cachelevel_to_pat: a platform dependent array mapping cache_level to
> pat_index.
>
> max_pat_index: the maximum PAT index supported by the hardware. Needed for
> validating the PAT index passed in from user space.
>
> i915_gem_get_pat_index: function to convert cache_level to PAT index.
>
> obj_to_i915(obj): macro moved to header file for wider usage.
>
> I915_MAX_CACHE_LEVEL: upper bound of i915_cache_level for the
> convenience of coding.
>
> Cc: Chris Wilson <chris.p.wilson at linux.intel.com>
> Cc: Matt Roper <matthew.d.roper at intel.com>
> Cc: Andi Shyti <andi.shyti at linux.intel.com>
> Signed-off-by: Fei Yang <fei.yang at intel.com>
Reviewed-by: Andi Shyti <andi.shyti at linux.intel.com>
Andi
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