[PATCH v2 07/17] drm/msm/dpu: Sort INTF registers numerically
Dmitry Baryshkov
dmitry.baryshkov at linaro.org
Thu Apr 20 00:47:57 UTC 2023
On 17/04/2023 23:21, Marijn Suijten wrote:
> A bunch of registers were appended at the end in e.g. 91143873a05d
> ("drm/msm/dpu: Add MISR register support for interface") rather than
> being inserted in a place that maintains numerical sorting. Restore
> that.
Assuming that = "sort order":
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
If I don't forget, I'll fix it when applying.
>
> Signed-off-by: Marijn Suijten <marijn.suijten at somainline.org>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 12 +++++++-----
> 1 file changed, 7 insertions(+), 5 deletions(-)
--
With best wishes
Dmitry
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