[PATCH 0/2] DPU1 GC1.8 wiring-up
Abhinav Kumar
quic_abhinavk at quicinc.com
Thu Apr 20 01:28:36 UTC 2023
On 4/19/2023 6:26 PM, Konrad Dybcio wrote:
>
>
> On 20.04.2023 03:25, Dmitry Baryshkov wrote:
>> On 20/04/2023 04:14, Konrad Dybcio wrote:
>>> Almost all SoCs from SDM845 to SM8550 inclusive feature a GC1.8
>>> dspp sub-block in addition to PCCv4. The other block differ a bit
>>> more, but none of them are supported upstream.
>>>
>>> This series adds configures the GCv1.8 on all the relevant SoCs.
>>
>> Does this mean that we will see gamma_lut support soon?
> No promises, my plate is not even full, it's beyond overflowing! :P
>
> Konrad
So I think I wrote about this before during the catalog rework/fixes
that the gc registers are not written to / programmed.
If thats not done, is there any benefit to this series?
>>
>>>
>>> Signed-off-by: Konrad Dybcio <konrad.dybcio at linaro.org>
>>> ---
>>> Konrad Dybcio (2):
>>> drm/msm/dpu1: Rename sm8150_dspp_blk to sdm845_dspp_blk
>>> drm/msm/dpu1: Enable GCv1.8 on many SoCs
>>>
>>> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 16 ++++++++--------
>>> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h | 16 ++++++++--------
>>> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h | 4 ++--
>>> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h | 4 ++--
>>> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h | 16 ++++++++--------
>>> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 16 ++++++++--------
>>> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h | 16 ++++++++--------
>>> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 16 ++++++++--------
>>> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 4 +++-
>>> 9 files changed, 55 insertions(+), 53 deletions(-)
>>> ---
>>> base-commit: 3cdbc01c40e34c57697f8934f2727a88551696be
>>> change-id: 20230420-topic-dpu_gc-6901f75768db
>>>
>>> Best regards,
>>
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